CAST IP Listing

The H264-D-BP IP core is a video decoder complying with the Constrained Baseline Profile of the ISO/IEC 14496-10/ITU-T H.264 stan…

• H.264 / AVC

The H264-E-BPF IP core is a video encoder supporting the Constrained Baseline Profile of the ISO/IEC 14496-10/ITU-T H.264 standar…

• H.264 / AVC

The H264-E-BPS IP core is a video encoder supporting the Constrained Baseline Profile of the ISO/IEC 14496-10/ITU-T H.264 standar…

• H.264 / AVC

The S80251XC3 core implements a high-performance 16-bit microcontroller that executes the MCS®251 & MCS®51 instruction sets and i…

• MCU
• Production Proven
• Now

ZipAccel-C is a custom hardware implementation of a lossless data compression engine that complies with the Deflate, GZIP, and ZL…

• Data Compression

The BA20 is a small, ultra-low-power, and very efficient 32-bit processor.

• CPU

The S8051XC3 IP core implements a high-performance, low-energy, 8-bit microcontroller that executes the MCS®51 instruction set an…

• MCU

This PCI Host Bridge IP core enables data transfers between an AMBA® AHB host processor bus system and PCI bus based devices.

• Protocol Bridge

This PCI Host Bridge IP core enables data transfers between an AMBA® AHB host processor bus system and PCI bus based devices.

• Protocol Bridge

Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection.

• Ethernet

The PCI-M32MF implements a master/target PCI interface compliant with the PCI 2.3 specification.

• PCI

The R8051XC2 configurable processor core implements a range of fast, 8-bit, micro-controllers that execute the MCS®51 instruction…

• MCU

The GPIO core is used to create functions in a system that are not implemented with dedicated controllers, and require simple inp…

• GPIO
• Production Proven
• Now

This PCI Host Bridge IP core enables data transfers between a host processor and PCI bus based devices.

• Protocol Bridge

The PCI-T32MF implements a target-only PCI interface compliant with the PCI 2.3 specification.

• PCI

The PCI-M32 implements a master/target PCI interface compliant with the PCI 2.3 specification.

• PCI

Highly flexible, low-latency, multiport TSN Ethernet switch

• Ethernet

The AXI-BRG enables communication between an AXI5 interface and an AXI4 interface.

• Protocol Bridge

The AXIS-BRG enables communication between an AXI5-Stream interface and an AXI4-Stream interface.

• Protocol Bridge

The APB-BRG enables communication between an APB5 Requester and an APB4 Completer.

• Protocol Bridge