DO-254 Multi-Format Video Deinterlacer 1.00a
High-performance video deinterlacer.
- Video Processing
- AVAILABLE
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
DO-254 Multi-Format Video Deinterlacer 1.00a
High-performance video deinterlacer.
DO-254 I2C Master Serial Interface Controller 1.00a
Master serial interface compatible with the popular Philips® I2C standard.
Consists of a separate transceiver (transmitter) and receiver IP core implementing a point to multipoint communication channel bu…
DO-254 ARINC 818 XGA Transceiver
Provides an easy way to implement ARINC 818 compliant interfaces in Xilinx® FPGAs.
Generates fully verified first-in, first-out (FIFO) memory queues ideal for applications requiring in-order data storage and retr…
DO-254 Distributed Memory Generator 1.00a
Creates a variety of memory structures using Select RAM.
DO-254 Block Memory Generator 1.00a
Automates the creation of resource and power optimized block memories for Xilinx® FPGAs Note: Used as sub-IP within FIFO Generator
DO-254 Local Memory Bus (LMB) 1.00a
The LMB is a fast, local bus for connecting MicroBlaze™ instruction and data ports to high-speed peripherals, primarily on-…
DO-254 LMB BRAM Interface Controller 1.00a
The interface between the LMB and the BRAM block peripheral.
DO-254 External Memory Controller 1.00a
Provides the control interface for external synchronous, asynchronous SRAM, Flash and PSRAM/Cellular RAM memory devices through t…
DO-254 AXI Universal Asynchronous Receiver Transmitter (UART) 16550 1.00a
Connects through an AXI4-Lite interface and provides the controller interface for asynchronous serial data transfer.
DO-254 AXI Timebase Watchdog Timer 1.00a
Provides a 32-bit free-running timebase and watchdog timer.
A 32-bit timer module that attaches to the AXI4-Lite interface, can be cascaded to 64-bit.
The core provides a point to point bi-directional interface between a user IP core and the AXI4 interconnect (to provide a smooth…
DO-254 AXI Serial Peripheral Interface (SPI) 1.00a
Provides a serial interface to SPI devices such as SPI EEPROMs and SPI serial flash devices.
DO-254 Processor System Reset Module 1.00a
Allows the designer to tailor their application by setting certain parameters to enable/disable features.
Provides a bidirectional interface between a user IP core and the AXI4 interface standard.
DO-254 AXI Interrupt Controller 1.00a
Concentrates multiple interrupt inputs from peripheral devices to a single interrupt output to the system processor.
Connects one or more AXI memory-mapped Master devices to one or more memory-mapped Slave devices.
DO-254 AXI General Purpose Input/Output (GPIO) 1.00a
Provides a general purpose input/output interface to the AXI4-Lite interface.