Vendor: Logicircuit, Inc. Category: Bus Fabric

DO-254 LMB BRAM Interface Controller 1.00a

The interface between the LMB and the BRAM block peripheral.

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Overview

The interface between the LMB and the BRAM block peripheral. A BRAM memory subsystem consists of the controller along with the actual BRAM components that are included in the BRAM block peripheral. Almost certainly needed for any MB system.

Key features

  • LMB v1.0 bus interfaces with byte enable support
  • Used in conjunction with BRAM block peripheral to provide fast BRAM memory solution for MicroBlaze™ ILMB and DLMB ports
  • Supports byte, half-word, and word transfers

Benefits

  • Mature source IP has been re-engineered for full DAL-A compliance for airworthiness and design assurance for safety-critical programs, supporting and simplifying the compliance effort at the FPGA level.

What’s Included?

  • Encrypted source along with a complete certification data package (CDP) including all artifacts required for chip-level compliance.

Specifications

Identity

Part Number
10115
Vendor
Logicircuit, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Logicircuit, Inc.

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Frequently asked questions about On-Chip Bus IP cores

What is DO-254 LMB BRAM Interface Controller 1.00a?

DO-254 LMB BRAM Interface Controller 1.00a is a Bus Fabric IP core from Logicircuit, Inc. listed on Semi IP Hub.

How should engineers evaluate this Bus Fabric?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Bus Fabric IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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