Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 28HPC
The capacity of the Display Port 1.4 Rx IP Channel is supported.
- UMC
- 28nm
- HPC
- In Production
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 28HPC
The capacity of the Display Port 1.4 Rx IP Channel is supported.
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 4.0 Base Specification with support of PIPE 4…
SD 5.1 / eMMC 5.1 Host Controller IP
Our Host IP is specially designed to combo both SD eMMC features.
1.8-3.6V to 2.7-3.0V step up DC/DC converter
130iHP_DCDC_01 is a high-performance step up DC/DC converter designed to operate with 1.8-3.6V input voltage.
Codasip Studio is a set of Electronic Design Automation (EDA) tools for processor design and customization.
Single-core video codec - HEVC, AVC
Single-core video codec - HEVC, AVC
Power Management Unit (2.3 - 3.0V output voltage, load current 20mA)
130iHP_PMU_01 is designed to form stabilized voltage with overcurrent indication (bit OVC).
130iHP_PA_03 is based on AB class power amplifier with a preamplifier.
Arasan Chip Systems, the provider of IP for Mobile Storage Standards, presents its latest xSPI Master IP for access to NOR Flash …
12-bit 1-channel 1 to 10 kSPS SAR ADC
130iHP_ADC_01 employs high-performance successive approximation architecture.
IO Library - GLOBALFOUNDRIES 22FDX
The general purpose 22FDX® IO Library features a rich set of digital and analog IO cells covering 1.2 V to 1.8 V I/O standards an…
True Random Number Generator (TRNG)
1.5Tb MACsec ENGINE True Random Number Generators (TRNGs) are used to generate statistically independent streams of bits for vari…
Digital Fault Injection Attack Detector
In cryptography, an attack can be performed by injecting one or several faults into a device thus disrupting the functional behav…
Cyber Escort Unit IP: Bridging Software and Hardware Security Gaps
The Cyber Escort Unit is designed to fill the security gap between software cyber security and hardware by escorting step by step…
Attacks on digital circuits can occur when an attacker attempts to physically alter the device's internal components.
Powered by the Focus Algorithm. Transforms audio streams to HD quality audio.
IP Core to be implemented inside block designs.
The security strength of many systems and applications is dependent on the quality of random number generators.
The IntelliProp IPC-GZ201A-ZM Gen-Z Switch is an IP Core that allows companies to build Gen-Z compliant components.
Single-core video decoder - AV1, HEVC, AVC, VP9, AVS2
Single-core video decoder - AV1, HEVC, AVC, VP9, AVS2
SHA IP Core with native SHA2-256 HMAC support
The DSHA2-256 is a universal solution which efficiently accelerates SHA2-256 hash function compliant with FIPS PUB 180-4.