12-bit 1-channel 1 to 10 kSPS SAR ADC
130iHP_ADC_01 employs high-performance successive approximation architecture.
Overview
130iHP_ADC_01 employs high-performance successive approximation architecture. The ADC operates with sampling rate from 1 to 10 kSPS and input clock from 14 to 140 kHz. The block has differential input and can operate in two modes: single measurement or continuous measurement. The ADC supports standby mode and features low power consumption, compact area.
Key features
- Resolution 12-bit
- Sample rate 1-10 kSPS
- Low power dissipation: 1 mW at 10 kSPS
- Separate power supplies for digital (2.5 V) and analog (2.5 V) parts
- iHP SiGe BiCMOS 0.13um technology
Block Diagram
Applications
- On chip voltage measurement
- Receivers
- Measurement equipment
- Medical equipment
What’s Included?
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Specifications
Identity
Analog
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about ADC IP core
Frequently asked questions about ADC IP cores
What is 12-bit 1-channel 1 to 10 kSPS SAR ADC?
12-bit 1-channel 1 to 10 kSPS SAR ADC is a ADC IP core from NTLab listed on Semi IP Hub.
How should engineers evaluate this ADC?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.