TSMC 40LP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC …
- TSMC
- 40nm
- LP
- Silicon Proven
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
TSMC 40LP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC …
TSMC 40LP 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 …
WebM’s G2 VP9 Decoder IP is the latest addition to WebM family of hardware IP products for multimedia system-on-chip designs.
Wide-Range Low-Area Digital PLL in TSMC 28HPM
Granite SemiCom Inc.
Camera 6/7-mode Combo Receiver - 1G/1.5Gbps
The CL12684KM4-8-12-16R3AM6-7ZIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.
General Purpose All Digital Fractional-N PLL in Samsung 14LPP
The DeepSub™ pPLL02F is a general purpose all digital PLL featuring low-jitter and compact area suitable for many clocking applic…
PDM to PCM Conversion, SMIC 65nmLL
The AR36S01 is a soft macro low-power digital microphone interface modulator IP.
The AR82S01 is a silicon-proven, low-power, ultra compact 16-22bit stereo audio CODEC IP fabricated in SMIC 65nmll logic process.
General Purpose All Digital Fractional-N PLL in GlobalFoundries 12LPP/14LPP
The DeepSub™ pPLL02F is a general purpose all digital PLL featuring low-jitter and compact area suitable for many clocking applic…
Bandpass filter (BPF) is two coupled circuits with capacitive external coupling.
LVDS 160MHz 8-Lane PHY TX IP on TSMC 16FFC
The CL12491M8TIP160 transmitter converts parallel RGB data and 4bits of HYNC,VSYNC,DE and Control) of CMOS parallel data into ser…
SLVS-EC TX PHY - 10GBPS 8-Lane - TSMC 12FFC
The CL12811M8TIP10000 TXPHY supports 8 TX DATA lanes for up to 10Gbps application.
Camera Receiver - 10.0Gbps 8-Lane - TSMC 12FFC
The CL12812M8RIP10000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) and D…
Camera Receiver - 5.0Gbps 8-Lane - TSMC 12FFC, 6FFC
The CL12812M8RIP5000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) and DS…
1 Kbyte EEPROM IP · 64 pages × 8 words × 16 bit
28 pages × 8 words × 16 bit, parallel word write, single high-voltage pulse erase/program with automatic sequencing.
LZ4-compatible hardware compressor and decompressor IP
Standards-based, LZ4-compatible hardware compressor and decompressor for storage and SSD controllers.
9bit time-based two-step ADC - GF 22nm FDX
Low power, 500MSPs, 9-bit time-based two-step ADC in GF 22nm FDX
2GS/s 11b dual I/Q DAC on GF 22nm FDX
Ultra-low power current-steering 2GS/s 11b dual I/Q DAC on GF 22nm FDX
JESD204b Deserializer PHY - GF 22nm FDX
JESD204b Deserializer PHY, 6.375 Gbps up to 12.5 Gbps per lane - GF 22nm FDX