1 Kbyte EEPROM IP
1 Kbyte EEPROM IP · 64 pages × 8 words × 16 bit
Overview
AeEEPROM_G130_03 is a non-volatile electrically erasable programmable read-only memory (EEPROM) IP with 1 Kbyte capacity, organized as 64 pages of 8 words by 16 bits with parallel word write and single-bit read output. Data is written and erased by a single high-voltage pulse with fully automatic erase/program sequencing; a built-in 7 MHz RC-oscillator provides internal clocking with a glitchless clock output. The block is optimized for industrial and commercial applications requiring low power consumption and low supply voltage, and is implemented in GF Embedded EEPROM 0.13µm technology in a compact 0.179mm² footprint.
KEY PARAMETERS
| Parameter | Condition | Min | Typ | Max | Unit |
| Supply voltage | – | 1.1 | 1.2 | 1.3 | V |
| Operating temperature range | – | –40 | +27 | +125 | °C |
| Output clock frequency | Built-in oscillator, default adj. | 5.3 | 7.0 | 10.2 | MHz |
| Read setup time | Relative to read signal | 10 | – | – | µs |
| Access time | Read | – | 0.15 | 0.35 | µs |
| Programming time | One word (erase + write) | – | 2.1 | – | ms |
| Current consumption, read mode | Excl. oscillator and ref. source | 2.9 | 3.8 | 7.6 | µA |
| Current consumption, write mode | Average / peak | 22.0 / 38.0 | 28.9 / 53.5 | 49.5 / 73.6 | µA |
| Standby current | VDD = 1.2 V, T = 27…125 °C | – | – | 0.1–2.2 | µA |
| Area | – | – | 0.179 | – | mm² |
| Block dimensions | Height × Width | – | 484.9 × 370.2 | – | µm |
Key features
- 1Kbyte memory: 64 (pages) × 8 (words) × 16 (bit)
- High density of memory cells
- Write and erase by one high-voltage pulse
- 1ms program / 1ms erase, adjustable 0.25–32ms
- Page and full-array write modes (SAP, SAW)
- Built-in 7MHz RC-oscillator, adjustable frequency
- Low power dissipation in standby and active mode
Block Diagram
Applications
- Access control systems
- RFID systems, smart cards
- Battery-powered electronic devices
- Chip serial ID and chip safety
What’s Included?
- GDSII
- CDL netlist
- Abstract views (LEF, LIB)
- Verilog model
- DRC / LVS / antenna
- reports
- Datasheet with integration guidelines
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 130nm | 130 1300 nm | Silicon Proven |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about EEPROM IP cores
What is 1 Kbyte EEPROM IP?
1 Kbyte EEPROM IP is a EEPROM IP core from Aftera listed on Semi IP Hub. It is listed with support for globalfoundries Silicon Proven.
How should engineers evaluate this EEPROM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this EEPROM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.