Vendor: Curious Corp. Category: SLVS-EC

SLVS-EC TX PHY - 10GBPS 8-Lane - TSMC 12FFC

The CL12811M8TIP10000 TXPHY supports 8 TX DATA lanes for up to 10Gbps application.

Contact Provider Request Datasheet
TSMC 12nm FFC Silicon Proven View all specifications

Overview

The CL12811M8TIP10000 TXPHY supports 8 TX DATA lanes for up to 10Gbps application. A wide range phase-locked clock is embedded in the IP to support multi data rate configuration. The CL12811M8TIP10000 transmitter supports the function that the polarity of differential signals for each data lane can be controlled. The CL12811M8TIP10000 transmitter is an ideal hard macro to solve EMI and interface size issues associated with high speed CMOS interface.
* Porting is also possible for processes other than the target process.
* We can provide the original LINK controller (soft macro).
It will be released by request-based. Please contact us for details.

Key features

  • SLVS-EC ver.3.0 compliant
  • Data Rate: Up to 10Gbps / lane
  • Number of data lane: 8
  • Support input clock: 24MHz, 54MHz, 37.125MHz, 72MHz, 74.25MHz
  • Polarity of TX differential output for each data lane is programmable.
  • Integrated wide range Phase Lock Loop
  • 4-bits programmable level of output differential voltage
  • Support BIST function for at-speed loopback test
  • Selectable data bus mode, 10-bit, 20-bit and 40-bit

Block Diagram

CL12811M8TIP10000 block diagram

Benefits

  • This IP is used as an output interface for CMOS image sensors and bridge chips. It supports the latest SLVS-EC 3.0 standard, and can transfer sensor output data at high speed. We can also supply a link controller upon customer request to realize the customer's system.
  • This IP can be implemented in 8-lane units and can be tailored to meet customer specifications.

Applications

  • Camera Application
    • Security Camera
    • Mobile-Phone Camera
    • DSC(Digital Still Camera)
    • Medical Camera
    • SLR
    • 3D Camera
    • Camcorder
  • ISP(Image Signal Processor)

What’s Included?

  • Verilog Model (verilog / vcs)
  • .db file / .lib(Option) file
  • symbol / LVS netlist / Hspice netlist(Option)
  • LEF, layer map file, layout technology file
  • Layout Verification Report (DRC & LVS), Command file
  • Datasheet (This file) /Application Note (Usage connection CIS)
  • Packaging and Layout Guideline / PCB Guideline
  • Static Delay Analysis (STA) Guideline
  • Testing Guideline (Option)
  • TX Verilog Model and Test Vector(Option)
  • CMOS Image Sensor Verilog Models(Option)
  • Link Layer IP(CD12811IP) and FPGA Board(Option)

Silicon Options

Foundry Node Process Maturity
TSMC 12nm FFC Silicon Proven

Specifications

Identity

Part Number
CL12811M8TIP10000
Vendor
Curious Corp.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Curious Corp.
HQ: Japan
Contact Curious Corp.

Learn more about SLVS-EC IP core

The Benefits of a Multi-Protocol PMA

At Silicon Creations, we have developed a power and area optimized, flexible and programmable PMA (Physical Medium Attachment) architecture that can be reliably ported to different process nodes and scaled across protocol generations as data rates increase. It is called the Multi-Protocol PMA, or MP-PMA for short.

How silicon and circuit optimizations help FPGAs offer lower size, power and cost in video bridging applications

FPGAs are at home in the world of multi-gigabit-per-second signal conversion and bridging. In high-bandwidth telecoms, network and data center equipment, the FPGA is a mainstay of system designs, offering a valuable combination of high-speed SerDes capability, extensive logic resources, and programmability, giving designers the flexibility to modify features and functions without changing their board layout.

Frequently asked questions about SLVS-EC IP cores

What is SLVS-EC TX PHY - 10GBPS 8-Lane - TSMC 12FFC?

SLVS-EC TX PHY - 10GBPS 8-Lane - TSMC 12FFC is a SLVS-EC IP core from Curious Corp. listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this SLVS-EC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SLVS-EC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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