What is JESD204b Deserializer PHY - GF 22nm FDX?
JESD204b Deserializer PHY - GF 22nm FDX is a JESD204 IP core from InCirT GmbH listed on Semi IP Hub. It is listed with support for globalfoundries Available on request.
Vendor:
InCirT GmbH
Category:
JESD204
JESD204b Deserializer PHY - GF 22nm FDX
JESD204b Deserializer PHY, 6.375 Gbps up to 12.5 Gbps per lane - GF 22nm FDX
Overview
This Deserializer PHY is implemented in Globalfoundries 22FDX CMOS technology. The IP macro offers 2x lanes with data rate up to 12.5 Gbps per lane and low power consumption (36 mW at 12.5Gbps). Its compact footprint of makes it an excellent choice for SoC designs that require ultra-high data rates such A/D and D/A convertors By paring with additional macros/lanes the overall achievable data rate can exceed 100 Gbps.
Key features
- JESD204C-B12 semi-compliant
- Data rate up to 12.5Gbps per lane
- 1-lane per IP macro
- GF22FDX/-PLUS CMOS technology
Block Diagram
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Applications
- SoCs requiring multi-Gbps data rates
- Radar Applications
- Satellite Communications
- Wireless Communications
What’s Included?
- GDSII layout
- Verilog (or SystemVerilog) model
- Integration support
- DRC, LVS reports
- Datasheet including characterization results
- CDL netlist for LVS
- LEF files
- Verification report
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 22nm | FDX | Available on request |
Specifications
Identity
Part Number
AIX-DES-12P5G-GF22DFX
Vendor
InCirT GmbH
Type
Silicon IP
Controller / PHY
PHY
Standards & Interfaces
JESD204 Version
JESD204B
Provider
HQ:
Germany
Frequently asked questions about JESD204 IP cores
How should engineers evaluate this JESD204?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this JESD204 IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.