This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
- TSMC
- 4nm
- N4AE
- Available on request
Sofics: Solutions for ICs
Sofics is a foundry independent semiconductor IP provider that has supported 130+ companies worldwide. We provide interfaces and I/Os that safeguard and enhance the core of your ICs with gold-standard solutions. Fabless companies using Sofics IP can enable higher performance, higher robustness and reduce design time and cost. Our technology has been characterized on 10+ foundries including advanced nodes at TSMC, UMC, GF, Samsung Foundry.
Our customers have integrated Sofics IP into more than 5000 IC designs across many different application verticals. Sofics IP is used in 40% of recent Bluetooth products, billions of smartphone imager chips, over a billion FPGA chips, most of the indoor positioning applications, in several car models and keys, optical communication modules for datacenters from multiple vendors and many other applications....
This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
TSMC 7nm 0V75 / 0V9 ESD Local Clamp – Low Cap
This specific IP macro is designed in TSMC 7nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
TSMC 65nm 3V3 ESD Local Clamp – Rad Hard
This specific IP macro is designed in TSMC 65nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
TSMC 5nm 1V8, 1.2V and 0.9V ESD Local Protection – Low Cap
This TSMC 3nm 1.8V, 1.2V and 0.9V ESD Local Protection IP provides low-capacitance, low-leakage protection for sensitive I/O and interface pins.
This TSMC 3nm 3.3V ESD Local Clamp provides compact, low-capacitance on-chip ESD protection for sensitive I/O and interface pins.
TSMC 3nm 1V2 ESD Local Clamp – Low Capacitance
This TSMC 3nm 1.2V ESD Local Clamp provides low-capacitance, low-leakage on-chip ESD protection for sensitive I/O and high-speed interface pins.
TSMC 22nm 5V5 ESD Power Clamp – Low Leakage
This TSMC 22nm 5.5V ESD Power Clamp provides low-leakage protection for sensitive supply and interface pins.
This specific IP macro is designed in TSMC 12nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
This TSMC 12nm 2.5V ESD Power Clamp IP macro provides compact, low-leakage ESD protection for FinFET designs.
This specific IP macro is designed in TSMC 12nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
TSMC 12nm 0V8 ESD Local Protection Low Cap
This TSMC 12nm 0.8V ESD Local Protection IP provides low-capacitance, low-leakage protection for sensitive I/O and interface pins.
SMIC 28nm 0V75 ESD Power Clamp
This specific IP macro is designed in 28nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
SMIC 28nm 0V75 ESD Local Clamp – Low Capacitance
This specific IP macro is designed in 28nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
This TSMC 3nm 3.3V GPIO IP provides configurable, overvoltage-tolerant I/O functionality for advanced-node designs.
This specific IP macro is designed in TSMC 22nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
The TSMC 2nm 1.2V GPIO offers configurable I/O functionality with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes.
SMC 2nm 1V8 ESD Power Clamp – Low Leakage
Silicon-proven ESD protection for GAA/nanosheet technologies
TSMC 2nm 1V8 ESD Local Clamp – Low Leakage
Silicon-proven ESD protection for GAA/nanosheet technologies
Sofics specialty I/Os offer configurable GPIOs with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes.
This TSMC 3nm 1.8V GPIO IP provides configurable, overvoltage-tolerant I/O functionality for advanced-node designs. The IP macro is designed in TSMC 3nm.