Vendor: IMEC Category: PLL

Ultra-Low Power Fractional-N digital PLL for IoT Applications in 40nm CMOS

IMEC’s divider-less All-Digital Phase Locked Loop (ADPLL) combines world’s lowest power consumption with performance and small si…

TSMC 40nm G Silicon Proven View all specifications

Overview

IMEC’s divider-less All-Digital Phase Locked Loop (ADPLL) combines world’s lowest power consumption with state-of-the-art performance and small silicon area. The ADPLL supports industrial requirements for popular 2.4GHz and SubGHz IoT radio standards, such as Bluetooth Low Energy (Bluetooth Smart), IEEE 802.15.4 (ZigBee, Thread) and others.

Key features

  • Support ULP 2.4GHz/SubGHz IoT , e.g.,
    • 2.4GHz :
      • Bluetooth 4.0 (BLE), 4.2 and 5.0
      • IEEE802.15.4 (ZigBee, ISA100.11a,WirelessHART, Thread, 6LoWPAN)
    • SubGHz:
      • IEEE802.15.4g (Wi-SUN), IEEE802.11ah (HaLow)
    • Ultra-low power (ULP) consumption: < 0.7mW
    • Best-in-class performance
      • Jitter < 2ps
      • Spur < -55dBc (in-band)
      • Spur< -70dBc (>2MHz)
      • Settling time< 15ms
    • Features
      • Extensive built-in self calibrations
      • Advanced power-efficient spur mitigation
      • Robust against freq. pulling/pushing with digital unwrap
    • Designed in TSMC 4nm LP for 1V nominal supply

Applications

  • Communications
  • Data processing
  • Consumer Electronics
  • Automotive
  • Industrial and medical

What’s Included?

  • Whitebox IP license with technology transfer training and support

Silicon Options

Foundry Node Process Maturity
TSMC 40nm G Silicon Proven

Specifications

Identity

Part Number
Ultra-low power fractional-N digital pll
Vendor
IMEC
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Belgium

Frequently asked questions about PLL IP cores

What is Ultra-Low Power Fractional-N digital PLL for IoT Applications in 40nm CMOS?

Ultra-Low Power Fractional-N digital PLL for IoT Applications in 40nm CMOS is a PLL IP core from IMEC listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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