Measure delay between edges of a signal(s) The SLM Clock & Delay Monitor (CDM) IP can be implemented in silicon with minimal area…
- Monitoring
System peripheral IP cores are essential building blocks in modern SoC and ASIC designs, providing control, management, and support functions for the overall system operation.
This category includes a wide range of peripheral functions such as DMA controllers, interrupt controllers, monitoring and health management blocks, power management controllers, storage-related controllers, system controllers, and timers & watchdogs. These IP cores help coordinate data movement, system supervision, power optimization, fault detection, and overall platform management.
This catalog allows you to explore and compare system peripheral IP cores from leading vendors based on functionality, performance, power consumption, and process node compatibility.
Whether you are designing embedded systems, automotive platforms, or industrial controllers, you can find the right peripheral IP to support your system architecture.
Measure delay between edges of a signal(s) The SLM Clock & Delay Monitor (CDM) IP can be implemented in silicon with minimal area…
The SLM Signal Integrity Monitor (SIM) IP enables signal quality measurement for die-to-die interfaces.
Multi-Channel Streaming DMA Controller
The MC-SDMA IP core implements a configurable, bandwidth-efficient, and easy-to-use Direct Memory Access (DMA) controller that tr…
The NVMe 2.3 VIP is fully compliant with the latest NVMe specifications.
Accelerated confidence in simulation-based verification of RTL designs with NVMe interfaces over PCIe or Fabric links The Avery N…
The Multi-Channel AXI DMA engine IP Core for AXI4 is a programmable AXI Stream to AXI memory mapped bridge with sophisticated dat…
The UFS 2.1 Host Stack is a stack developed for UFS Host Controllers that are used to connect to UFS devices via UniPro/M-PHY.
UFS Hardware Validation Platform (HVP)
Universal Flash Storage (UFS) is a simple, high performance, mass storage device with a serial line interface.
The Universal Flash Storage (UFS) is a JEDEC data transfer standard is designed for mobile systems.
The Universal Flash Storage (UFS) is a JEDEC data transfer standard is designed for mobile systems.
The Universal Flash Storage 3.0 (UFS 3.0) is a simple but high-performance, serial interface primarily used in mobile systems, be…
SD Card / SDIO Card Combo Device IP
SD / SDIO Card Combo Device IP core is SD memory controller and a SDIO controller with an AHB interface.
The SDIO Card Device IP core is used to implement SDIO cards that are connected to a Host processor over a standard SD bus.
SD 3.0 / eMMC 4.51 Hardware Validation Platform
SD and MMC memory card interfaces dominate the mobile storage markets such as tablets, smartphones, video camcorders, and many ot…
The SD Card Host IP is a integrated host controller IP solution that supports three key memory card I/O technologies: SD 3.0 SDIO…
The eMMC Host controller IP is a integrated host controller IP solution that supports three key memory card I/O technologies: eMM…
SD 4.1 / SDIO 4.1 / eMMC 4.51 Host Controller IP
The SD 4.1/SDIO 4.1 IP from Arasan Chip Systems is a integrated host controller IP solution that supports three key memory card I…
The SD 4.1 Device Controller IP core is used to implement SD cards that are connected to a Host processor over a standard SD bus.
SD 3.0 / SDIO 3.0 / eMMC 5.1 Host Controller IP
The SD 3.0/SDIO 3.0/eMMC 5.1 Host IP is a integrated host controller IP solution that supports three key memory card I/O technolo…
SD 4.1 eMMC 5.1 Dual Host Controller IP
The SD 4.1/SDIO 4.0/eMMC 5.0 Host IP from Arasan Chip Systems is a integrated host controller IP solution that supports three key…