Embedded Hardware Security Module for Automotive and Advanced Applications
PUFhsm is an embedded Hardware Security Module solution for automotive chips and general applications.
- Root Of Trust
Security IP cores provide the hardware foundation required to protect modern SoC and ASIC designs against an increasingly sophisticated threat landscape. They enable secure data processing, trusted device operation, intellectual property protection, and compliance with industry security standards.
This category includes a comprehensive range of security technologies, from cryptography engines for encryption, decryption, hashing, and authentication, to interface security solutions that protect data in transit. It also covers key management IP for secure key generation and storage, root of trust implementations that establish a trusted security foundation, secure processing architectures for isolated execution of sensitive workloads, and side-channel protection technologies designed to mitigate power, timing, electromagnetic, and fault-injection attacks.
This catalog allows you to explore and compare Security IP cores from leading vendors based on security capabilities, performance, certification readiness, attack resistance, silicon maturity, and process node compatibility.
Whether you are developing connected IoT devices, automotive platforms, industrial equipment, consumer electronics, networking infrastructure, or cloud and edge computing systems, you can identify the security IP solutions needed to build resilient and trustworthy semiconductor products.
Embedded Hardware Security Module for Automotive and Advanced Applications
PUFhsm is an embedded Hardware Security Module solution for automotive chips and general applications.
Agile Post Quantum Crypto (PQC) Public Key Accelerator - NIST algorithms
Common public key algorithms include RSA, Digital Signature Algorithm (DSA), and Diffie-Hellman (DH), which require the calculati…
AES GCM IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Encryption Standard (AES) specification i…
Fully compliant solution that provides Ethernet Layer 2 Security for port and data privacy The MAC Privacy Protection IP is a ful…
TLS 1.3 Compliant Crypto Coprocessor
PUFcc7 is the latest revision of the vendor’s high-security Crypto Coprocessor.
AES IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Encryption Standard (AES) specification in "F…
Highly configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems
configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems – from Core to Multi-instance Manager with Queuing or Strea…
Single instance HW Lattice PQC ultra accelerator
Single instance HW Lattice PQC ultra accelerator as an AXI subordinate PQPerform-Flare is a hardware-based FIPS 140-3 CAVP-certif…
Fast Quantum Safe Engine for ML-KEM (CRYSTALS-Kyber) and ML-DSA (CRYSTALS-Dilithium) with DPA
The Quantum Safe Engine (QSE) IP provides Quantum Safe Cryptography acceleration for ASIC, SoC and FPGA devices.
Ensuring the system security by safeguarding the integrity, authenticity, freshness, and confidentiality of assets The KSE portfo…
External NOR flash protection solution that supports real-time decryption and execution in place
The Flash Protection Series is a suite of enhancements available for PUFcc and PUFrt, extending the Hardware Root of Trust to pro…
External NAND flash protection, designed to secure stored assets with a local key from PUF
The Flash Protection Series is a suite of enhancements available for PUFcc and PUFrt, extending the Hardware Root of Trust to pro…
Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
The ICE-IP-338 (EIP-338) Inline Cipher Engine is a scalable, high-performance, multi-stream inline cryptographic engine that offe…
The AES engine IP is a high-performance cryptographic engine operates in AES NIST Federal information processing standard FIPS-19…
HDCP Encryption-Decryption Engine
The Trilinear Technologies High-bandwidth Digital Content Protection (HDCP) Encryption Decryption Engine IP core implements the H…
The Secure Debug IP provides isolation between 2 domains.
Embedded Flash Protection with Hardware Root of Trust and Lite Crypto Engine
The Flash Protection Series is a suite of enhancements available for PUFcc and PUFrt, extending the Hardware Root of Trust to pro…
PUFcc is a novel high-security Crypto Coprocessor.
The eSi-SHA512 core is an easy to use SHA hash accelerator peripheral for both SHA512 and SHA384.
The eSi-DES block performs encryption and decryption of 64-bit words using the DES (Data Encryption Standard) and TDEA (Triple DE…