Vendor: IntelliProp Inc. Category: Symmetric Crypto

AES Encryption Core with XTS

The IntelliProp IPC-BL120A-ZM is an AES-XTS Encryption Core supporting 128 or 256 bit encryption.

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Overview

The IntelliProp IPC-BL120A-ZM is an AES-XTS Encryption Core supporting 128 or 256 bit encryption. The IPC-BL120A-ZM provides encryption/decryption based on a design principle known as substitution-permutation network (SP-network). An SP-network takes a block of the plaintext (clear data or non-encrypted data) and the key as inputs, and applies several alternating “rounds” or “layers” of substitution boxes and permutation boxes to produce the ciphertext (encrypted data). The IPC-BL120A-ZM is fully verified in pseudo random simulation.

Key features

  • Full Verilog core
  • 128 or 256 bit selectable AES encryption
  • The AES-XTS algorithm is FIPS-197 certified, cert. no 2408.
  • The encode and decode channels are made to look and act like independent FIFOs for ease of integration. The control block has a register interface to be easily managed by a hardware state machine or controlled by a processor for operations such as key initialization, and TWEAK configuration and management.
  • Programmable number of pipeline paths allows the user to balance area/bandwidth requirements. The number of parallel pipelines can be configured to support high performance/high throughput applications as well as lower performance and/or resource limited applications.
  • The core has a simulation test bench and register initialization sequence to support rapid integration
  • Processor and RTL control interface
  • Independent Cipher/Inverse Cipher key management
  • Concurrent encode and decode support
  • Bypass functionality to send data through the Core unmodified
  • Supports integer multiples of 16 byte Data Unit sizes

Applications

  • Applications that require integration into the data path to provide encryption/decryption of data
  • Applications where high levels of encryption are required
  • Applications requiring FIPS-197 certified encryption/ decryption algorithms
  • Applications that require very high throughput and an encryption solution that has minimal impact on throughput

What’s Included?

  • Encrypted RTL code
  • Self-checking test bench in Verilog Modelsim (please contact IntelliProp for latest supported Modelsim versions). Other simulators may be supported, please check with IntelliProp.
  • Simulation scripts, vectors, and expected results
  • Synthesis or place and route script
  • Comprehensive user documentation

Specifications

Identity

Part Number
IPC–BL120A–ZM
Vendor
IntelliProp Inc.
Type
Silicon IP

Security

Crypto Algorithm
AES

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact IntelliProp Inc.

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Frequently asked questions about Symmetric Cryptography IP cores

What is AES Encryption Core with XTS?

AES Encryption Core with XTS is a Symmetric Crypto IP core from IntelliProp Inc. listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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