Advanced Encryption Standard Module
The CC-AES-AXI is a synthesisable Verilog model of a Encryption Standard module.
Overview
The CC-AES-AXI is a synthesisable Verilog model of a Advanced Encryption Standard module. The AES core can be efficiently implemented on FPGA and ASIC technologies.
Key features
- AMBA AXI4-Lite bus
- Encryption and decryption
- ECB mode
- Programmable key length
- Fully synthesizable synchronous design with positive edge clocking
- DFT ready
Block Diagram
Benefits
- Synthesizable RTL Verilog source code
- Technology independent IP Core
- Suitable for FPGA and ASIC
- Easy SoC integration
- Full implementation and maintenance support with individual approach
- Flexible licensing scheme
What’s Included?
- Verilog RTL source code
- Verification suite
- Datasheet and integration guide
- C-header file
- Constraints
- Technical support
Specifications
Identity
Security
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Symmetric Cryptography IP cores
What is Advanced Encryption Standard Module?
Advanced Encryption Standard Module is a Symmetric Crypto IP core from ChipCraft listed on Semi IP Hub.
How should engineers evaluate this Symmetric Crypto?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.