Vendor: ChipCraft Category: Symmetric Crypto

Advanced Encryption Standard Module

The CC-AES-AXI is a synthesisable Verilog model of a Encryption Standard module.

Overview

The CC-AES-AXI is a synthesisable Verilog model of a Advanced Encryption Standard module. The AES core can be efficiently implemented on FPGA and ASIC technologies.

Key features

  • AMBA AXI4-Lite bus
  • Encryption and decryption
  • ECB mode
  • Programmable key length
  • Fully synthesizable synchronous design with positive edge clocking
  • DFT ready

Block Diagram

Benefits

  • Synthesizable RTL Verilog source code
  • Technology independent IP Core
  • Suitable for FPGA and ASIC
  • Easy SoC integration
  • Full implementation and maintenance support with individual approach
  • Flexible licensing scheme

What’s Included?

  • Verilog RTL source code
  • Verification suite
  • Datasheet and integration guide
  • C-header file
  • Constraints
  • Technical support

Specifications

Identity

Part Number
CC-AES-AXI
Vendor
ChipCraft
Type
Silicon IP

Security

Crypto Algorithm
AES

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Poland

Learn more about Symmetric Crypto IP core

RoT: The Foundation of Security

The goal of this white paper is to provide a primer introduction to RoT and how to choose a right RoT as the trust anchor for a novel hardware based security architecture

Frequently asked questions about Symmetric Cryptography IP cores

What is Advanced Encryption Standard Module?

Advanced Encryption Standard Module is a Symmetric Crypto IP core from ChipCraft listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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