Implementation of the new WPAN security standard for MBOA MAC requires the NIST standard AES cipher in CTR and CBC modes (a.k.a.
- AES
Cryptography IP cores provide hardware-based security functions for protecting data, communications, and digital assets in modern SoC and ASIC designs. By offloading cryptographic operations from software, these IP cores deliver higher performance, lower latency, improved energy efficiency, and stronger resistance to security attacks.
This category includes Symmetric Cryptography, Public Key Cryptography, Post-Quantum Cryptography (PQC), Hash / MAC, and Random Number Generator (RNG) IP solutions. Available implementations may support algorithms such as AES, ChaCha20, RSA, ECC, ML-KEM, ML-DSA, SHA-2, SHA-3, HMAC, CMAC, and true or deterministic random number generation technologies required for secure key management and authentication.
This catalog enables semiconductor engineers to evaluate and compare Cryptography IP from leading vendors based on supported algorithms, security certifications, throughput, latency, power consumption, silicon area, side-channel resistance, quantum-safe capabilities, and semiconductor process node compatibility.
Implementation of the new WPAN security standard for MBOA MAC requires the NIST standard AES cipher in CTR and CBC modes (a.k.a.
Implementation of the new WPAN security standard (802.15.3) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a.
The Enhanced AES (Rijndael) IP Core provides numerous building blocks that are used to put together an encryption core for a vari…
This core is a fully compliant implementation of the Message Digest Algorithm MD5.
Helion offer a suite of AES-GCM solutions which allow the user to choose a level of hardware acceleration which closely fits the …
This core is a fully compliant implementation of the Secure Hash Algorithm, SHA-1.
This core family implements various aspects of the AES ( Encryption Standard) algorithm.
This core is a full implementation of the Triple DES encryption algorithm.
Composed of three dedicated HW IP cores (PolyCore, KeccakCore, MaskCore) and the software stack
co-processor supporting NIST’s selected Post-Quantum Cryptography (PQC) standards
Supports the polynomial arithmetic required by lattice-based cryptography algorithms
The Keccak IP core supports Keccak-based hash functions, including the SHA3 and SHAKE families.
PUF-based Post-Quantum Cryptography (PQC) Solution
As quantum computing advances at an unprecedented pace, traditional cryptographic systems are encountering new challenges.
IPSEC AES-256-GCM (Standalone IPsec)
XIP7213E implements the Internet Protocol Security (IPsec) as standardised in RFC4303 and RFC4305.
Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
DVB Local Scrambling Algorithm Core
The Helion DVB LSA Scrambler and Descrambler cores implement the Local Scrambling Algorithm as specified to provide MPEG-2 Transp…
The Helion Fast AES XTS core implements the AES “XEX-based Tweaked Codebook with Ciphertext Stealing” cipher mode (abbreviated to…
The Helion 3GPP KASUMI cores perform the f8 confidentiality and f9 integrity algorithms required to provide data security within …
G.9961 AES-CCM Frame Encryption Core
G.hn is a standard for home networking over power, coaxial, or telephone cable, or a combination of the three.