PQC Co-Proc IP Core

PQC Co-Proc IP core is a co-processor that supports NIST’s selected Post-Quantum Cryptography (PQC) standards, ML-KEM (Kyber), ML-DSA (Dilithium), SLH-DSA (SPHINCS+), and FN-DSA (Falcon). This IP is fully compliant with the NIST’s published standards, and offers countermeasures against Side-Channel Analysis attacks.

• Supported Algorithms (algorithm set is customizable):
  • ML-KEM
    • FIPS-203 compliant
    • Key Generation, Encapsulation, Decapsulation
    • All security levels: ML-KEM-512, ML-KEM-768, ML-KEM-1024
  • ML-DSA
    • FIPS-204 compliant
    • Key Generation, Signature Generation, Signature Verification
    • All security levels: ML-DSA-44, ML-DSA-65, ML-DSA-87
  • SLH-DSA
    • FIPS-205 compliant
    • Key Generation, Signature Generation, Signature Verification
    • All security levels: SLH-DSA-SHAKE-128s/f, SLH-DSA-SHAKE-192s/f, SLH-DSA-SHAKE-256s/f
  • FN-DSA
    • Falcon Round 3 Submission compliant. Will be updated with FIPS-206 upon its publication
    • Signature Verification
    • All security levels: Falcon-512, Falcon-1024
• Optional Side-Channel Analysis and Fault Injection attacks countermeasures (e.g., masking)
• AXI4 interface for system integration available upon request
• Crypto-agility: Modifications to existing implementations (e.g., new countermeasures) and new algorithms can be implemented by re-programming the RISC-V core’s firmware

• Encrypted Netlist
• Synthesis Scripts
• Firmware (binary)
• Comprehensive Documentation