DVB Local Scrambling Algorithm Core

The Helion DVB LSA Scrambler and Descrambler cores implement the Local Scrambling Algorithm as specified to provide MPEG-2 Transport Stream packet security within DVB Content Protection and Copy Management (DVB-CPCM) compliant systems. Both cores provide all operations required to scramble or descramble MPEG-2 TS packets, including IV generation using either MSC Data Independent (MDI) or MSC Data Dependent (MDD) mode, and payload protection using either AES-CBC or AES-RCBC cipher chaining modes.

Both Helion LSA cores have been designed especially for use in Altera FPGA technology to provide high performance combined with the lowest possible logic resource utilisation. They can support DVB-CPCM content scrambling and descrambling applications capable of data throughputs in excess of 200 Mbps using even the lowest cost Cyclone family devices.

• Implements DVB Local Scrambling Algorithm as required to provide content protection within DVB-CPCM
• Provides MPEG-2 Transport Stream packet scrambling/descrambling for DVB-CPCM compliant systems
• Supports both AES CBC and RCBC chaining modes
• Supports both MDI and MDD “Must Stay Clear” Data modes Bypass mode provides seamless handling for unscrambled PIDs
• Available as separate Scrambler and Descrambler cores
• Highly optimised for use in Altera FPGA technology

• Target specific netlist or fully synthesisable RTL VHDL or Verilog
• VHDL/Verilog simulation model and testbench with test vectors
• Comprehensive user documentation