Advanced Encryption Standard Module
The CC-AES-APB is a synthesisable Verilog model of a Encryption Standard module.
- AES
Symmetric Cryptography IP cores implement hardware-based cryptographic functions for trusted SoC and ASIC architectures in modern SoC and ASIC designs.
These IP cores support high-throughput block and stream cipher acceleration for secure data protection, helping designers improve security throughput, reduce CPU overhead, and strengthen system trust anchors
This catalog allows you to compare Symmetric Cryptography IP cores from leading vendors based on security level, throughput, power efficiency, and process node compatibility.
Whether you are designing storage encryption, secure communications, IoT devices, or secure embedded systems, you can find the right Symmetric Cryptography IP for your application.
Advanced Encryption Standard Module
The CC-AES-APB is a synthesisable Verilog model of a Encryption Standard module.
The ChaCha-IP-13 (EIP-13) is an IP solution for accelerating the ChaCha20 cipher algorithm (RFC7539), supporting the NIST CTR mod…
Encryption and Decryption are fed with an input of 128 bits length and an initial key of one of the supported key lengths (128, 1…
The ntAES_XTS IP Core is fully compliant with AES-XTS algorithm standardized at NIST SP800-38E and IEEE 1619-2007 recommendations…
ChaCha20-Poly1305 Crypto Engine
The ChaCha20-Poly1305 Crypto Engine is RFC7539 compliant to provide Authenticated Encryption with Associated Data (AEAD) using th…
This IP core implements the Kuznyechik cipher of the Russian Federation GOST 3412-2015 standard (also available in English as RFC…
The 3DES core is a drop-in module that includes the following functions : • 192-bit key size • Single or Triple Data Encryption S…
The AES core is a drop-in module that includes the following functions: • 128/192/256-bits key size • Automatic Roundkey calculat…
The CCM1 cores are tuned for mid-performance generic AES-CCM applications per NIST SP 800-38C.
Ultra-Compact 3GPP Cipher Core
The ZUC1 core implements ZUC stream cipher in compliance with the 3GPP Confidentiality and Integrity Algorithms 128-EEA3 & 128-EI…
The AES-XTS Multi-Booster crypto engine includes a generic & scalable implementation of the AES algorithm making the solution sui…
The AES MPEG-TS interface core allows to encrypt or decrypt MPEG-TS stream using the MVD AES encryption core.
The AES-IP-38 (EIP-38) is IP for accelerating the AES symmetric cipher algorithm supporting GCM or XTS modes at extreme speeds up…
This configurable implementation of the XTS-AES algorithm for storage encryption implements the full NIST SP800-38E specification…
NIST FIPS-197 Compliant Ultra-Low Power AES IP Core
ntAES8 core implements NIST FIPS-197 Encryption Standard.
This implementation of the AES-CCM algorithm implements the full NIST draft SP800-38C specification.
25 Gb/s AES-ECB 128/192/256 Crypto Cores
Concurrent EDA AES cores implement the 128-bit block size NIST FIPS AES Algorithm.
The SNOW-IP-46 (EIP-46) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as s…
AES 128/256 Encryption - Symmetric Security Range
The family of IPX-AES IP-Cores provides an efficient FPGA implementation of the Encryption Standard (AES).
This configurable implementation of the AES-GCM algorithm implements the full NIST draft SP800-38D specification.