AMBA CHI IP Listing

AMBA AHB Bus to DDR SDRAM Controller

• Controller

Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master …

• Network-On-Chip

The SD 4.1/SDIO 4.1 IP from Arasan Chip Systems is a integrated host controller IP solution that supports three key memory card I…

• SD / eMMC Controller

The SD 4.1/SDIO 4.0/eMMC 5.0 Host IP from Arasan Chip Systems is a integrated host controller IP solution that supports three key…

• SD / eMMC Controller

World-class, industry-leading, highly scalable, silicon- and PHY-agnostic IP core with 116 Gbps line rate, interoperability tested with leading Serdes providers

• Interlaken

SD / SDIO Card Combo Device IP core is SD memory controller and a SDIO controller with an AHB interface.

• SD / eMMC Controller

The SDIO Card Device IP core is used to implement SDIO cards that are connected to a Host processor over a standard SD bus.

• SD / eMMC Controller

eMMC 4.51 is the latest specification released by JEDEC and is designed to meet the requirements for secure yet flexible program …

• SD / eMMC Controller

The 10 Gigabit Ethernet (XGMAC) IP core is compliant with the Ethernet IEEE 802.3-2008 standard and provides an interface between…

• Ethernet

The SD 3.0/SDIO 3.0/eMMC 5.1 Host IP is a integrated host controller IP solution that supports three key memory card I/O technolo…

• SD / eMMC Controller

The QSPI master core is easy to use, simple to work with, quick to operate, and reliable under all conditions.

• SPI / QSPI XSPI

A Physically Unclonable Function (PUF) is a security mechanism that uses the inherent physical variations of a device to generate…

• PUF
• Silicon Proven
• ISO/IEC 20897

Attacks on digital circuits can occur when an attacker attempts to physically alter the device's internal components.

• Fault Injection Protection
• Silicon Proven
• Available now
• Common Criteria

The Veriest Register Indirect RAM Access Design IP provides a bridge between the embedded AMBA AHB bus and a configurable number …

• Register File
• Fully Verified
• Now
• AMBA 3

The VS_MIPI_CSI2_DEVICE is a CSI-2 device-side controller that implements the CSI-2 protocol for transmitting data to a CSI-2-com…

• Controller
• MIPI CSI2
• MIPI CSI-2

The Neuchips eFuse Controller IP is a robust hardware solution designed to manage embedded fuse (eFuse) arrays.

• eFuse / OTP

FTADDR is a memory controller for DDR2,DDR3 and DDR4 SDRAM memory devices.

• Controller
• DDR2 + 2

Accelerated confidence in simulation-based verification of RTL designs with USB interfaces: UCM2, USB3.1, USB3.2, USB-C, Other US…

• Verification IP

The NeuraScale Scalable Switch Fabric is a WeaveIP™ system IP solution that is designed from the ground-up to provide non-blockin…

• Bus Fabric

HBM3 interface provides full support for the HBM3 interface, compatible with draft JEDEC specification version 1.02 and DFI-versi…

• Controller