Scalable Switch Fabric

Extreme port-density, non-blocking, multi-chiplet switch fabric for AI scale-up and scale-out systems. NeuraScale supports large numbers of UALink™, Ultra Ethernet, UCIe, and AMBA ports while maintaining low latency, robust bandwidth, and a tile-friendly physical design for scalable chiplet-based architectures.

AI infrastructure is reaching the limits of traditional switch architectures. As GPU clusters continue to scale, conventional crossbars become increasingly difficult to implement due to wiring complexity, physical design challenges, and limited scalability. Next-generation AI systems require a new approach that delivers non-blocking communication while scaling efficiently across thousands of ports and multiple chiplets.

NeuraScale is Baya's non-blocking switch fabric IP designed specifically for AI scale-up and scale-out systems. Built on a distributed array of replicated switching tiles instead of a monolithic crossbar, NeuraScale delivers crossbar-class performance with dramatically improved scalability, physical design efficiency, and faster time to market.

Supporting UALink™, Ultra Ethernet, AMBA, and UCIe-based chiplet connectivity, NeuraScale enables software-defined, modular switch architectures that can scale from hundreds to thousands of ports while maintaining low latency, predictable bandwidth, and implementation flexibility.

Non-Blocking Switching Performance

Deliver crossbar-class, single-hop communication with predictable low latency and guaranteed non-blocking behavior, even as AI systems scale to thousands of ports.

Extreme-Radix Scalability

Scale from hundreds to thousands of UALink™, Ultra Ethernet, or AMBA ports through a distributed tile architecture that supports multi-chiplet AI systems without inherent port limitations.

Chiplet-Ready Physical Design

Simplify implementation using a modular architecture built from a single reusable design tiles, reducing wiring complexity and accelerating physical design and time to market.

Optimized Transport Architecture

Support high-throughput multicast, weighted fair bandwidth allocation, deadlock prevention, and efficient flow control to maximize performance across demanding AI workloads.

Enterprise-Ready Infrastructure

Accelerate deployment with integrated debug, monitoring, RAS, ECC protection, runtime repair, and performance management capabilities for reliable operation at scale

• Scales to thousands of ports through replicated tiles
• Physical design-friendly modular architecture
• Single reusable switch tile
• Faster time to market
• Native chiplet-ready architecture