Vendor: Veriest Solutions Ltd. Category: Register File

Register Indirect RAM Access

The Veriest Register Indirect RAM Access Design IP provides a bridge between the embedded AMBA AHB bus and a configurable number …

Overview

The Veriest Register Indirect RAM Access Design IP provides a bridge between the embedded AMBA AHB bus and a configurable number of embedded SRAM devices for test, initialization and other low bandwidth purposes. The Veriest Register Indirect RAM Access is ideal for IP developers to provide access to shared RAMs in which the CPU needs to have limited access whereas another RAM client has priority access. After a simple register configuration setup by the CPU, the RAMs can be accessed for read and write through the AHB slave interface.


Key features

  • Easy integraton
  • AMBA AHB 3.0 Compatible
  • AHB Reads, Writes
  • Burst Types: Single, INCR, INCR4, INCR18, INCR16
  • Transfer size 32-bit aligned only
  • Configurable address bus width (32-bit / 64-bit)
  • Configurable data bus width (32-bit / 64-bit / 128-bit)
  • Configurable number of RAMs to access
  • Configurable RAM width
  • Low latency

Block Diagram

VV1700 block diagram

Benefits

  • Low Gate Count
  • Low Power Consumption
  • Fully Verified
  • Spyglass Lint Validated
  • Standards Compliant

Applications

  • General System on Chip Use

What’s Included?

  • Synthesizable Verilog RTL
  • Verilog test bench and test cases
  • Detailed block diagram and technical documents

Specifications

Identity

Part Number
VV1700
Vendor
Veriest Solutions Ltd.
Type
Silicon IP

Provider

Learn more about Register File IP core

Where Routine Flow Ends Veriest Formal Expertise Begins

Some bugs are nearly impossible to catch through standard simulation alone. Discover how Veriest’s Formal team tackles complex verification challenges – from solving tough convergence issues in minutes to building custom environments for non-standard models.

Veriest Solutions and Neuronix AI Labs Collaborate for Neural Network Acceleration

Veriest Solutions, a leading VLSI Design Services house, and Neuronix AI Labs – an IP Core provider for highly-efficient neural network acceleration, will be demonstrating breakthrough performance for edge computer vision inferencing at the upcoming Embedded World Conference in Nuremberg on March 14th-16th (Hall 3, booth#531).

Frequently asked questions about Register File IP cores

What is Register Indirect RAM Access?

Register Indirect RAM Access is a Register File IP core from Veriest Solutions Ltd. listed on Semi IP Hub.

How should engineers evaluate this Register File?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Register File IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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