USB 2.0 PHY - SMIC 55nm Eflash
IP
- USB 2.0
- SMIC
- 55nm
- LL
- Silicon Proven
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
USB 2.0 PHY - SMIC 55nm Eflash
IP
USB 2.0 PHY - SMIC 55nm Eflash
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IP
USB 2.0 OTG Controller - SMIC 55nm Eflash
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VESA Display Stream Compression (DSC) IP Core
Display Stream Compression offers inter-operable, visually lossless real-time, video compression to satisfy the emerging high ban…
APB4 General Purpose Input/Output Module
The APB4 GPIO Core is fully parameterised core designed to provide a user-defined number of general purpose, bidirectional IO to …
The AMBA APB v2.0 bus protocol – commonly referred to as APB4 – defines a low-cost interface that is optimized for minimal power …
The Roa Logic AHB-Lite Multi-layer Interconnect is a fully parameterized High Performance, Low Latency Interconnect Fabric soft I…
Rambus’s AXI Interface Core is designed for use in applications requiring ARM’s eXtensible Interface (AXI).
CoaXPress Multi-Device Multi-Stream Host
The CoaXPress standard defines a cost effective and easy interfacing between video devices and acquisition hardware over RG59 and…
CoaXPress Multi-Link Multi-Stream Device
The CoaXPress standard defines a cost effective and easy interfacing between video devices and acquisition hardware over RG59 and…
Display Stream Compression (DSC 1.2) Decoder
The Display Stream Compression (DSC) Decoder core offers realtime decompression of high-definition streams with resolutions from …
High Channel Count DMA IP Core for PCI-Express
The High Channel Count (HCC) DMA IP core for PCI-Express is a PCIe Endpoint with multiple industry standard AXI Interfaces.
Next generation CMOS image sensor interface SLVS-EC is the next-generation, high-speed interface for high-resolution CMOS image s…
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IP
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Ncore Cache Coherent Interconnect IP
High-bandwidth, low-latency network-on-chip (NoC) interconnect for rapid modular innovation.
Silicon agnostic Ethernet MAC IP for lower speeds from 10M to 2.5G Ethernet MAC 10M/100M/1G/2.5G IP is a solution that enables th…
Ultra compact Ethernet Switch designed for easy use, targets applications requiring low size and a versatile solution The 1G Ethe…