Special I/O-eMMC/SDIO in TSMC(22nm, 28nm, and 40nm)
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwid…
- TSMC
- 28nm
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
Special I/O-eMMC/SDIO in TSMC(22nm, 28nm, and 40nm)
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwid…
PCIe 4.0 PHY in TSMC(6nm,7nm, 12nm,16nm)
M31 PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
ONFI I/O 6.0/5.1/5.0 IP in TSMC(3nm, 5nm, 6nm, 12nm, 16nm, 22nm, 28nm, 40nm, 55nm)
ONFI I/O is a non-volatile memory interface technology with high bandwidth capabilities, mainly developed for flash storage appli…
SCR7 is a high-performance, silicon-proven, Linux-capable 64-bit RISC-V processor core optimized for applications that demand dat…
The LINFlexD Controller is a serial communication interface designed for Local Interconnect Network (LIN) applications.
xSPI NOR/NAND Flash & HyperRAM Controller
Emerging high-performance applications demand increasingly fast read throughputs from NOR_Flash/ NAND Flash/ HyperRAM memory devi…
MIPI CSI-2 Receiver v2.0 Controller IP, Compatible with MIPI C-PHY & D-PHY
The CSI-2 Receiver IP is in charge of handling CSI2 & SMIA protocols, as well as depacking input data to pixels.
The BRIDGE_UART_I2C IP Core provides a simple and convenient way to interface a standard UART bus to a standard I2C bus.
IP Solutions for the AMBA Interconnect
The Synopsys IP solutions for the ARM® AMBA® interconnect include synthesizable IP, verification IP (VIP) and automated assembly …
IP Prototyping Kits for USB, DDR, MIPI, PCI Express protocols
The Synopsys IP Prototyping Kits, part of the IP Accelerated initiative, center around a , out-of-the-box reference design that c…
The SONY_CAM_IF IP Core provides a simple way to connect the Sony® FCB-EV range of cameras to your FPGA.
Silicon agnostic Ethernet MAC IP for 10G, 25G speeds Ethernet MAC 10G/25 IP is a solution that enables the host to communicate da…
Ethernet 1G/2.5G/5G/10G/25G and CPRI 7.0 PCS
The vendor offers a PCS IP core that can be used for both Ethernet and CPRI.
The SPI to AXI Bridge IP core is commonly used as a monitor interface to allow external devices to access the internal AXI bus.
Ethernet TSN MAC 10M/100M/1G/2.5G
Silicon agnostic Ethernet TSN MAC IP, IEEE 802.3 Ethernet Layer 2 solution with support for key TSN features The TSN MAC 10M/100M…
The DB-SPI-XIP-FLASH-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting access to Single/Dual/Quad…
The logiHSSL IP core enables high-speed communication between microcontrollers of Infineon's AURIX family (TC2xx and TC3xx) and X…
Ultra-Low-Latency 10GE PHY+MAC
Having the lowest network latency is critical for Accelerated Finance.
Ultra Low Latency 10G TCP Endpoint
The TCP Endpoint implements a full, reliable streaming network stack in FPGA logic.
10 Gb/s full HW stack UDP/IP Transmitter/Receiver
10 Gb/s full HW stack UDP/IP Transmitter/Receiver IP block for high performance data transfers from embedded Ethernet based syste…