Low-Speed Control Interface IP cores provide the communication, control, monitoring, and management functions required by modern SoCs, microcontrollers, automotive systems, industrial equipment, and embedded platforms. These interfaces enable reliable connectivity between processors, sensors, peripherals, power-management devices, and external subsystems.
This catalog includes IP solutions for widely adopted control and management protocols such as I2C/I3C, SPI/QSPI/xSPI, UART, CAN, CAN FD, CAN XL, LIN, GPIO, IEEE 1588/PTP, MIPI RFFE, PMBus, Smartcard, ARINC 429, MIL-STD-1553, FlexRay, SENT, HDLC, and other specialized interfaces. Compare controller, target, and protocol IP offerings from multiple vendors based on standards compliance, feature sets, safety support, performance, and integration requirements.
CAN Controller Core with 8/16 Message Objects
CANmodule-III is a full functional CAN controller module that supports the concept of mailboxes.
Inter-Integrated Circuit (I2C) Master Module
The Inter-IC bus, or I2C bus is a two wire serial bus.
High-Level Data Link Controller
Inicore's iniHDLC family of High-Level Data Link Controller (HDLC) cores consist of a Receiver (FPR: From Primary Rate) and a Tra…
Serial Peripheral Interface - Master/Slave
The DSPI is a fully configurable SPI master/slave device, which allows user to configure polarity and phase of serial clock signa…
Peripheral Sensor Interface (PSI5) Host Controller
Configurable automotive Peripheral Sensor Interface (PSI5) host controller that implements the ECU side of PSI5 communication systems
AMBA Bus Host to eSPI Controller/Target
eSPI Controller/Target RTL SystemVerilog IP Core
AMBA Bus Host to eSPI Controller
The Digital Blocks DB-eSPI-Controller-AMBA is a fully compliant Intel Enhanced Serial Peripheral Interface (eSPI) Base Specificat…
eSPI Target RTL SystemVerilog IP Core
Enhanced Serial Peripheral Interface – Controller IP with single, dual, and quad eSPI Bus support for Intel CPU’s
Microsecond Channel (MSC/MSC-Plus) Controller
The MSC-CTRL IP core implements a high-speed serial interface controller designed to connect a microcontroller or SoC to external…
This IP integrates both xSPI (Expanded Serial Peripheral Interface) and eMMC 5.1 PHY (Physical Layer) into a single unified solut…
Supports DMA transfers between M_CAN Message RAM and System Memory Up to sixteen 32-bit timestamps supported by TSU On reception …
Smart connectivity for mobile, IoT, and automotive innovation The DI3CS device is an I3C Target that complies with the MIPI® Alli…
MECHATROLINK-III Master/Slave IP
MECHATROLINK-III Master/Slave IP together with CPU communicates with the products adapting.
Timing and Synchronization protocol implementation for application in Automotive Ethernet (AVB/TSN), Industrial automation and co…
The proliferation of sensors in mobile wireless and mobile-influenced products has created significant design challenges.
A comprehensive VIP solution for multiple versions of the FlexRay standard used by SoC and IP designers to ensure comprehensive v…
LIN-Xactor is a comprehensive VIP solution for the LIN standard used by SoC and IP designers to ensure comprehensive verification…
The MIPI I3C host interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compat…
The I3C Device Controller IP Implements Device Controller functionality as defined by the MIPI Alliance’s I3C Specification.