TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
TSMC N3E 1.2V/1.8V GPIO Library with 1.8V Failsafe MS Add on
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
TSMC N3E 1.2V/1.8V GPIO Library with 1.8V Failsafe
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
TSMC 4nm (N4P) 1.2V/1.8V I3C Libraries
Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device.
TSMC 5nm (N5) 1.2V/1.8V I3C Libraries
Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device.
TSMC N3E 1.2V/1.8V I3C MS add-on
Synopsys I3C IO library supports a simplified system of connecting and managing multiple sensors in a device.
Synopsys I3C IO library supports a simplified system of connecting and managing multiple sensors in a device.
0.9V/1.2V I/O Library in TSMC 55nm
A 0.9V/1.2V I/O Library in TSMC 55LP.
Complete measurement analog front end (AFE) IP for single phase power metering
It is comprised of a high resolution Mixed-signal Front-End and of a dense Power and energy Computation Engine to achieve at the …
Complete measurement analog front end (AFE) IP for three-phase power metering
It is comprised of a high resolution Mixed-signal Front-End and of a dense Power and energy Computation Engine to achieve at the …
Combo voltage regulator designed in TSMC 40 ULP, combining a linear regulator for active mode with an ultra-low quiescent regulat…
Retention Alternating Regulator - High temperature (Grade 1, Tj=150°)
RAR-eSR-qLR-OV-LB-LS-ref-[2.7-5.5]-[0.55-3.3].07e, as any Power Management Virtual Component designed by Dolphin Design, is readi…
Low-leakage LDO in TSMC 40 ULP to supply logic and analog domains (up to 5.5V input supply) with embedded Level Shifters Applicab…
Buck Switching Inductor Regulator - High temperature (Grade 1, Tj=150°)
eSR-Tugela-OV-LS-LB-Bu-ref-[2.7-5.5]-[0.55-3.3].07f, as any Power Management Virtual Component designed by Dolphin Design, is rea…
Buck Switching Inductor Regulator - High temperature (Grade 1, Tj=150°)
eSR-Tugela-OV-LS-LB-Bu-ref-[2.7-5.5]-[0.55-3.3].07e, as any Power Management Virtual Component designed by Dolphin Design, is rea…
The sCOD100-uLP-ANC-H1-LR-D.02 is a mixed (analog and digital) Virtual Component containing a stereo ADC, one mono DAC with headp…
JESD204B Tx-Rx PHY IP, Silicon Proven in TSMC 65GP/55GP
The JESD 204B controller IP is optimized and silicon agnostic implementation of the JEDEC JESD204B standard targeting any ASIC, F…