Up to 105 dB of SNR, 24-bit stereo CODEC with PDM to PWM transmodulator DAC and embedded regulator
The sCODa-MT1-LR.06 is an audio CODEC which provides the insurance of the best sound quality after integration into a SoC for Set…
Overview
It benefits from unique features, such as the AGC to automaticaly adapt the voice level and a wind noise filter enabling the best recording quality.
Moreover its ultra small area ensures a cost-effective SoC integration to Fabless companies.
Key features
- Low BoM thanks to Jerkless and PLL-less features
- Low noise embedded linear regulator for best resilience to power supply noise
- Automatic Gain Control (AGC)
- Programmable Wind Noise Filter
Block Diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 28nm | 28nm 280 nm | Silicon Proven |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Audio Codec IP cores
What is Up to 105 dB of SNR, 24-bit stereo CODEC with PDM to PWM transmodulator DAC and embedded regulator?
Up to 105 dB of SNR, 24-bit stereo CODEC with PDM to PWM transmodulator DAC and embedded regulator is a Audio Codec IP core from Dolphin Semiconductor listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.
How should engineers evaluate this Audio Codec?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Audio Codec IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.