IO pad library IP provides the physical interface between internal core logic and external chip pins. These libraries are critical for signal integrity, ESD robustness, voltage domain interoperability, manufacturability, and reliable chip-level integration across semiconductor products.
Explore IO pad IP libraries including GPIO, analog pads, high-speed pads, and protection structures tailored to foundry process requirements.
Differential Clock Receiver to CML on TSMC CLN3E
The Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of appl…
Differential Clock Receiver to CML on TSMC CLN2P
The Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of appl…
Differential Clock Receiver on TSMC CLN7FF
The Differential Clock Receiver macro addresses a large portfolio of applications.
Differential Clock Receiver on TSMC CLN4P
The Differential Clock Receiver macro addresses a large portfolio of applications.
DDR3/DDR3L Compatible I/O Buffer on TSMC CLN40G
The impedance programmable I/O buffer provides a high-speed physical interface solution to support the increasing bandwidths dema…
Chip-to-Chip IO Buffer on TSMC CLN6FF
The Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra- short reach environments, usi…
Chip-to-Chip IO Buffer on TSMC CLN5A
The Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra- short reach environments, usi…
Chip-to-Chip IO Buffer on TSMC CLN5
The Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra- short reach environments, usi…
Chip-to-Chip IO Buffer on TSMC CLN4P
The Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra- short reach environments, usi…
The Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra- short reach environments, usi…
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
TSMC N3P Source Sync 3DIO Library
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
TSMC N5 Source Sync 3DIO Library
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
Over-voltage Protection Module
Over-voltage Protection Module enabling direct connection of voltage regulators to 5.5 V batteries with standard 1.8 V I/O devices
1.2V/3.3V GPIO Library with 3.3V I2C ODIO in TSMC 110nm
A TSMC 110nm Wirebond and Flipchip compatible I/O library with 1.2V/3.3V Fail-Safe GPIO, 3.3V I2C Open-Drain I/O, SPI and associa…
TSMC 7nm (7FF) 3.3V SMBUS (I2C) IO
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D…
Synopsys Inter-Integrated Circuit (I2C) IO library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D,…