V-by-One/ LVDS Tx IP, Silicon Proven in SMIC 40LL
The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections.
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+
The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwid…
1.5G MIPI D-PHY in SMIC 130nm~28nm
The ACTT family of interface IP for MIPI protocols is the way with mobile-optimized low power and high performance.
512x8 Bits OTP (One-Time Programmable) IP, SMIC 110nm 1.2V/3.3V Mixed Signal Generic Process
The AT512X8Z110LL0AA is organized as a 512-bit by 8 one-time programmable (OTP).
USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.0 Base Specification with support…
V-by-One Rx IP, Silicon Proven in SMIC 40LL
The V-by-One HS technology aims to transmit video signals at a high data rate using internal equipment connections.
V-by-One Tx IP, Silicon Proven in SMIC 40LL
V-by-One HS technology targets a high-speed data transmission of video signals based on the internal connection of equipment.
MIPI D-PHY Tx IP, Silicon Proven in SMIC 55LL
The MIPI D-PHY Analog TX IP Core fully complies with version 1.2 of the D-PHY specification.
MIPI D-PHY Rx IP, Silicon Proven in SMIC 55LL
The D-PHY specification, version 1.2, is perfectly complied with by the MIPI D-PHY Analog RX IP Core.
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in SMIC 14SF+
With this PHY IP, it supports both USB 3.1 Gen1 and Gen2.
USB 3.0 PHY IP, Silicon Proven in SMIC 14SF+
For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered.
USB 2.0 PHY IP, Silicon Proven in SMIC 40LL
The USB 2.0 PHY IP Core is a solution for the physical layer (PHY) that prioritizes both high performance and low power consumpti…
USB 2.0 PHY IP, Silicon Proven in SMIC 55LL
The USB2.0 PHY IP is a comprehensive physical layer (PHY) IP solution created for exceptional performance and low power consumpti…
USB 2.0 PHY IP, Silicon Proven in SMIC 14SF+
The USB2.0 PHY IP is a comprehensive physical layer (PHY) IP solution created for exceptional performance and low power consumpti…
PCIe 2.0 Serdes PHY IP, Silicon Proven in SMIC 55LL/SP/EF
PCIe Gen 2.0 PHY IP is a physical layer (PHY) IP solution for mobile, consumer and Enterprise applications that enable for a well…
PCIe 2.0 Serdes PHY IP, Silicon Proven in SMIC 40LL
PCIe Gen 2 PHY IP is a physical layer (PHY) IP solution for consumer electronics, that allows for a full featured customization a…
The transmitter is designed to support Single link transmission between Host and Flat Panel Display up to 1080p resolutions, Dual…
IP
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers ope…
3.3V 32 KHz RTC and Programmable 100MHz Oscillator I/O Pad Set
The Oscillator library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal.