Vendor: T2M GmbH Category: MIPI PHY

MIPI D-PHY Rx IP, Silicon Proven in SMIC 55LL

The D-PHY specification, version 1.2, is perfectly complied with by the MIPI D-PHY Analog RX IP Core.

MIPI D-PHY SMIC 55nm LL In Production View all specifications

Overview

The D-PHY specification, version 1.2, is perfectly complied with by the MIPI D-PHY Analog RX IP Core. Supported protocols include the Display Serial Interface (DSI) and MIPI Camera Serial Interface (CSI-2). This RX PHY consists of one clock lane and four data lanes. The D-PHY is made up of an analogue front end for creating and receiving electrical level signals and a digital back end for managing I/O operations. internally terminated resistor that is automatically calibrated.

Key features

  • Compliant to MIPI Alliance Standard for
  • D-PHY specification Version 1.2
  • Supports standard PPI interface compliant to MIPI Specification
  • Supports synchronous transfer at high-speed mode with a bit rate of 80-2500 Mb/s
  • Supports asynchronous transfer at low power mode with a bit rate of 10 Mb/s
  • Supports ultra-low power mode, high-speed mode and escape mode
  • Supports one clock lane and up to four data lanes
  • Data lanes support transfer of data in high-speed mode
  • Supports error detection mechanism for sequence errors and contentions
  • Supports contention detection
  • Configurable skew option for each Clock and Data lanes
  • Silicon Proven in SMIC 55LL

Block Diagram

What’s Included?

  • GDSII & layer map
  • Place-Route views (.LEF)
  • Liberty library (.lib)
  • Verilog behaviour model
  • Netlist & SDF timing
  • Layout guidelines, application notes
  • LVS/DRC verification reports

Silicon Options

Foundry Node Process Maturity
SMIC 55nm LL In Production

Specifications

Identity

Part Number
MIPI D-PHY Rx IP in 55LL
Vendor
T2M GmbH
Type
Silicon IP

Standards & Interfaces

MIPI PHY
MIPI D-PHY

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Germany

Learn more about MIPI PHY IP core

Super Edge Medical SoC (SEMC)

Post Covid 19, the biggest bet for revival of the industry is on 5G proliferation across the world. It is widely expected that 5G’s Enhanced Mobile broadband (eMMB) with speeds as high as 20X of 4G speed, Ultra reliable and Low Latency Communication ( URLLC) and massive Machine type connectivity (mMTC) will transform the world.

Frequently asked questions about MIPI PHY IP

What is MIPI D-PHY Rx IP, Silicon Proven in SMIC 55LL?

MIPI D-PHY Rx IP, Silicon Proven in SMIC 55LL is a MIPI PHY IP core from T2M GmbH listed on Semi IP Hub. It is listed with support for smic In Production.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP