The SD library provides the driver / receiver cell and required support cells for SD 3.0 signaling.
- Samsung
- 28nm
- Pre-Silicon
The SD library provides the driver / receiver cell and required support cells for SD 3.0 signaling.
Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process
The POR-[1.8-5.5]-[0.9-1.4].01 is a Power-On-Reset designed in Samsung Foundries 65nm LFR6LP process nodes.
Low-power capacitor-less LDO designed in Samsung Foundries LF6RLP process
The caplessLDO-ref-[1.8-5.5]-[0.9-1.4].01 is a capacitor-less Linear Regulator with programmable output voltage, used to generate…
The caplessLDO-ref-[1.8-5.5]-[0.9-1.4].01 is a capacitor-less Linear Regulator with programmable output voltage, used to generate…
Low-voltage detector designed in Samsung Foundries 65nm LFR6LP process node
Low-voltage detector designed in Samsung Foundries 65nm LFR6LP process node to monitor its own AVD supply and generate informatio…
MIPI D-PHY Transmitter/Receiver for Samsung 28nm FD-SOI
The MIPI® D-PHY Transmitter/Receiver is useful 4 Data Lanes transmitter/receiver hard macro for DSISM/CSI-2® of Samsung 28nm FD-SOI process.
HDMI 2.0 Receiver with MHL 2.0
IP
PVT Sensor on Samsung 14LPP-Samsung
The PVT Sensor is a integrated macro for monitoring process, voltage, and temperature variation on-chip, allowing very high preci…
Frequency Synthesizer
LVDS Driver/Buffer
LVDS Receiver
LVDS Transmitter
DisplayPort transmitter IP
DisplayPort Receiver IP
HDMI 1.4/2.0/2.1 transmitter IP
HDMI 1.4/2.0/2.1 transmitter IP
HDMI 1.4/2.0/2.1 receiver IP
MIPI C-PHY/D-PHY combo Rx
SEC 5nm LVH 6T Multi-Bits Latch
SEC 5nm LVH 6 track High Density Multi-Bits Latch
Samsung 28nm FDSOI USB3.0 and PCIE2 combo PHY
The USB3.0 Super-Speed / PCI Express Combo PHY is a programmable IP that is compatible with the PHY Interface for PCI Express and…
The (R)GMII library provides the combo driver / receiver and required support cells for (R)GMII signaling.