Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process
The POR-[1.8-5.5]-[0.9-1.4].01 is a Power-On-Reset designed in Samsung Foundries 65nm LFR6LP process nodes.
Overview
It is used to monitor AVD and VDD supplies and to generate information to the SoC regarding the proper establishment of these AVD and VDD supplies.
Key features
- Low-power power-on-reset solution for power-critical IoT applications (50 nA operating current)
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| Samsung | 8nm | 8LPP | Pre-Silicon |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Power-On Reset (POR) IP cores
What is Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process?
Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process is a Power On Reset (POR) IP core from Dolphin Semiconductor listed on Semi IP Hub. It is listed with support for samsung Pre-Silicon.
How should engineers evaluate this Power On Reset (POR)?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.