Vendor: Dolphin Semiconductor Category: Power On Reset (POR)

Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process

The POR-[1.8-5.5]-[0.9-1.4].01 is a Power-On-Reset designed in Samsung Foundries 65nm LFR6LP process nodes.

Samsung 8nm 8LPP Pre-Silicon View all specifications

Overview

The POR-[1.8-5.5]-[0.9-1.4].01 is a Power-On-Reset designed in Samsung Foundries 65nm LFR6LP process nodes.
It is used to monitor AVD and VDD supplies and to generate information to the SoC regarding the proper establishment of these AVD and VDD supplies.

Key features

  • Low-power power-on-reset solution for power-critical IoT applications (50 nA operating current)

Silicon Options

Foundry Node Process Maturity
Samsung 8nm 8LPP Pre-Silicon

Specifications

Identity

Part Number
POR-1.8-5.5-0.9-1.4.01_SF_65_LFR6LP
Vendor
Dolphin Semiconductor
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Power On Reset (POR) IP core

Breaking new energy efficiency records with advanced power management platform

The free lunch offered for decades by Moore’s law is now over and scaling down to the next technology node no longer offers the required energy efficiency gains. Design teams must now pursue their gains by deploying increasingly complex power management techniques to meet the demands of the new IoT markets.

New Power Management IP Solution Can Dramatically Increase SoC Energy Efficiency

This Position Paper describes a family of Power Management IP solutions integrated by Dolphin Integration’s customers into their SoC to drastically improve Energy Efficiency (EE). SoC performance metric is changing, moving from pure performance metric (GHz or MIPS) to performance efficiency and minimum power consumption. This new metric, already crucial for IoT or mobile devices, is becoming key in various applications, like automotive, embedded or space.

Improving Battery-Powered Device Operation Time Thanks To Power Efficient Sleep Mode

Allowing battery-powered devices to run, without battery recharge, for years rather than months, partakes in enhancing significantly end-user satisfaction and is a key point to enabling the emergence of IoT applications. Numerous applications, such as M2M, BLE, Zigbee…, have an activity rate (duty cycle) such that the power consumption in sleep mode dominates the overall current drawn by the SoC (System on Chip). For such applications, the design of the “Always-On power domain" (a.k.a AON power domain) is pivotal.

A versatile Control Network of power domains in a low power SoC

Developing and verifying a control network in a low-power SoC is a challenging task, especially managing the different states of regulators and modes of power domains. This article first describes state-of-the-art approaches to addressing this issue, and then delves into the solution promoted by Dolphin Integration to go further, thanks to the easy and secure Maestro� solution to manage SoC power mode transitions.

Three types of headset detection to embed in audio converters

In mobile electronics, a single device suffices to cover various daily usages: calling, taking pictures, playing music, geolocating, etc… All of these common features should fit in one’s hand. To adequately implement these new functionalities, audio electronics must not be limited to basic plug and play functionalities any longer. Smartphone applications should be compliant with new user practices by enabling more interactivity and giving more possibilities to control the inner functionalities.

Cache Evaluation Software: A Dynamically Configurable Cache Simulator

The memory hierarchy (including caches and main memory) can consume as much as 50% of an embedded system power. This power is very application dependent, and tuning caches for a given application is a good way to reduce power consumption. However application programs are complex and include many subroutines, each of them having their own optimal cache configuration. We developed a low power dynamically reconfigurable cache controller and its simulator called Cache Evaluation Software.

Frequently asked questions about Power-On Reset (POR) IP cores

What is Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process?

Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process is a Power On Reset (POR) IP core from Dolphin Semiconductor listed on Semi IP Hub. It is listed with support for samsung Pre-Silicon.

How should engineers evaluate this Power On Reset (POR)?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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