PCI Express Gen3 / SATA3 SERDES PHY on Samsung 28FDSOI
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- PCIe Gen3
- Samsung
- 28nm
- FDS
PCI Express Gen3 / SATA3 SERDES PHY on Samsung 28FDSOI
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
USB 2.0 femtoPHY - Samsung 8LPP18 x1, OTG, North/South (vertical) poly orientation
The USB 2.0 PHY IP provides designers with the industry's best combination of low area and low power with support for USB Type-C …
USB 2.0 femtoPHY - Samsung 7LPP18 x1, OTG, North/South (vertical) poly orientation
The USB 2.0 PHY IP provides designers with the industry's best combination of low area and low power with support for USB Type-C …
USB 2.0 femtoPHY - Samsung 14LPP18 x1, OTG, North/South (vertical) poly orientation
The USB 2.0 PHY IP provides designers with the industry's best combination of low area and low power with support for USB Type-C …
USB 2.0 femtoPHY - Samsung 11LPP18 x1, OTG, North/South (vertical) poly orientation
The USB 2.0 PHY IP provides designers with the industry's best combination of low area and low power with support for USB Type-C …
USB 3.0 PHY - Samsung 28LPP18 x1, OTG, North/South (vertical) poly orientation
The USB-C 3.0 and USB 3.0 PHY IP provide designers with the industry's best combination of low area and low power with support fo…
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
USB-C 3.1/DP TX PHY for Samsung 14LPP, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
USB-C 3.1/DP TX PHY for Samsung 11LPP, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
32G PHY, Samsung 8LPP x4, North/South (vertical) poly orientation
The multi-lane Multi-Protocol 32G PHY IP is part of a high-performance multi-rate transceiver portfolio for high-end networking a…
32G PHY, Samsung 10LPP x4, North/South (vertical) poly orientation
The multi-lane Multi-Protocol 32G PHY IP is part of a high-performance multi-rate transceiver portfolio for high-end networking a…
SAR-ADC, 12-bit, 1~2.5Msps, 8-input, SamSung 14LPP, N/S orientation
The M31 SAR ADC provides a rich portfolio with a resolution from 10 to 12-bit, maximum speed up to 2.5MSPS, and supports input ty…
eUSB2 v1.1 Dual-Role, repeater/native mode PHY, SamSung 28FDSOI, 1.8V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
1.8V Capable GPIO on Samsung Foundry 4nm FinFET
The 1.8V capable GPIO is an IP macro for on-chip integration.
28G LR Multi-Protocol SerDes (MPS) PHY - Samsung 14nm
Optimized for power and area, our line-up of SerDes PHYs, delivering maximum performance and flexibility.
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
1.8V/3.3V Switchable GPIO with 5V I2C Open Drain and Analog Cells in Samsung 11nm
A Samsung 11nm Flip-Chip I/O library with dynamically switchable 1.8V/3.3V GPIO with fail-safe capability, 5V I2C / SMBus open-dr…
3.3V 100MHz Oscillator IO Inline Pad Set
The 3.3V 100MHz Oscillators library provides a 100 MHz crystal oscillator macro I/O cell.
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core po…