Automatic Generation of a Network-on-Chip Interconnect
This post discusses the network-on-chip (NoC) approach and explains how Agnisys can help you generate NoCs automatically for your designs.
Vendor:
Agnisys, Inc.
Category:
Bus Fabric
Crossbars Interconnect
An interconnect component connects initiators and targets in a system.
Overview
An interconnect component connects initiators and targets in a system. A single initiator system simply requires a decoder and multiplexor, which are explained in the following sections. In a multi-initiator system, an interconnect is necessary for signal routing and arbitration between initiators to the proper target. This route is necessary for address, control, and write data signals. This specification does not include the specific methodologies implemented for multi-initiator systems, including single or multi-layer interconnects.
Key features
- APB
- N X M Where N stands for initiators and M stands for targets.
- AHB
- N X M Where N stands for initiators and M stands for targets.
- Maximum initiators can be 16 as per AMBA-AHB specification.
- AXI
- N X M Where N stands for initiators and M stands for targets.
- Maximum initiators can be 16 as per AMBA-AXI specification.
Specifications
Identity
Part Number
Crossbars Interconnect
Vendor
Agnisys, Inc.
Type
Silicon IP
Provider
HQ:
USA
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Frequently asked questions about On-Chip Bus IP cores
What is Crossbars Interconnect?
Crossbars Interconnect is a Bus Fabric IP core from Agnisys, Inc. listed on Semi IP Hub.
How should engineers evaluate this Bus Fabric?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Bus Fabric IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.