TileLink is a chip-scale connection standard that enables many masters to have synchronised memory mapped access to memory and ot…
- Protocol Bridge
- Released
- Now
- Yes
Agnisys is a provider of Electronic Design Automation (EDA) software and methodology services, solving complex front-end design, verification, and validation problems in system chip development. Its ISO certified IDesignSpec™ Solution Suite leverages a golden executable specification to capture and centralize registers, sequences, and connectivity for Intellectual Property (IP) and System-on-a-Chip (SoC) projects. Its intuitive user interfaces and standards-based workflows reduce risk by eliminating development errors while increasing productivity and efficiency through the automatic generation of collateral for the entire project development team. Founded in 2007, Agnisys is headquartered in Boston, Massachusetts, with R&D centers in the United States and India.
TileLink is a chip-scale connection standard that enables many masters to have synchronised memory mapped access to memory and ot…
Avalon interfaces make system design easier by allowing you to connect components in Intel FPGAs.
The Wishbone System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores is a versatile design approach for semicondu…
Peripheral Bus (APB) is one of the Microcontroller Bus Architecture (AMBA) family protocols.
AMBA AHB is a bus interface designed for high-performance synthesizable applications.
The " extensible interface" (AXI) bus is a high-performance parallel bus that connects on-chip peripheral circuits (or IP blocks)…
An interconnect component connects initiators and targets in a system.
The bus converter module transforms 64-bit wide initiator data buses to smaller 32-bit target data buses or vice-versa.
Various bus types of protocols are available and employed in many applications, all of which require a bridge to operate safely a…
Decoder logic controls numerous targets based on input from the initiator.