Vendor: Vervesemi Microelectronics PVT LTD Category: DAC

12b, 3.3Gsps, 0.9/1.8V Self Calibrating, Current steering DAC with Low area in TSMC 28nm

DA12B3300M28HPC is high performance 12b current steering DAC that supports data rate up-to 3.3Gsps.

12 Bit TSMC 28nm Silicon Proven View all specifications

Overview

DA12B3300M28HPC is high performance 12b current steering DAC that supports data rate up-to 3.3Gsps. DAC core consists of a current source matrix with quad switching architecture, controlled from an adaptive balanced driver and re-timing latches. It has all necessary calibration circuitry to provide excellent static and dynamic linearity performance. There is an integrated multiplexer to multiplex 8 lanes of 12b data to achieve 3.3Gsps effective data rate. SPI/Parallel digital interface is available for control and configuration of different IP modes.

Key features

  • Technology: TSMC 28nm HPC
  • 12b Resolution
  • Programmable 10mA Differential Current source
  • In built mismatch, Self-Calibration for excellent linearity
  • Dynamic Performance: 68dB SFDR up-to 1GHz
  • 1.8V ±10% Analog Power Supply
  • 0.9V ±5% Digital Core Power Supply
  • Integrated Voltage and Current References
  • INL ±2LSB, DNL ±1LSB, Gain Error 5%
  • Full Scale Output Current 10mA (programmable)
  • NSD -160dbm/Hz
  • Very low silicon area
  • Ultra-Low power

Benefits

  • High-Performance
  • Self Calibrating
  • Very Fast Calibration Time
  • Small Die Area
  • Low power
  • Suitable for 5G

Applications

  • Wideband wireless communication
  • 5G, LTE
  • DOCSIS 3.1 CMTS
  • Instrumentations, Automatic Test Equipment ATE
  • Radars

What’s Included?

  • Datasheet
  • Hard Macro (GDSII)
  • Characterization Report (as applicable)
  • Abstract View (LEF)
  • Integration and Customer Support

Silicon Options

Foundry Node Process Maturity
TSMC 28nm 28nm 280 nm Silicon Proven

Specifications

Identity

Part Number
DA12B3300M28HPC
Vendor
Vervesemi Microelectronics PVT LTD
Type
Silicon IP

Analog

Resolution bits
12 Bit

Provider

Learn more about DAC IP core

Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR

In high end RF systems, such as 5G radios, the requirements are so stringent that the source of this strongest unwanted tone can be the PLL. This article outlines how spurs in the input clock to the ADC or DAC may limit the SFDR. This in turn will set the requirements for the spurs for the input clock (from a PLL), in order to achieve a specific SFDR.

Frequently asked questions about DAC IP cores

What is 12b, 3.3Gsps, 0.9/1.8V Self Calibrating, Current steering DAC with Low area in TSMC 28nm?

12b, 3.3Gsps, 0.9/1.8V Self Calibrating, Current steering DAC with Low area in TSMC 28nm is a DAC IP core from Vervesemi Microelectronics PVT LTD listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this DAC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DAC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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