32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP (DSP)
The 32-bit D45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructi…
- RISC-V
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP (DSP)
The 32-bit D45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructi…
High performance Linux capable vector processor
The SiFive Intelligence VIU75 Standard Core is a single-core instantiation of our RISC-V application processor with vector extens…
A RF Transceiver (IP/die) for adding Bluetooth Low Energy v5.2 (2.4GHz) capability to any SoC with embedded MCU via a standard SP…
DVB-S2X NarrowBand Demodulator IP
This is NarrowBand demodulator IP is silicon proven and extratced from production chipsets, it performs demodulation according to…
U74-MC Multicore: four U74 cores and one S76 core
The SiFIve U74-MC Standard Core is the world's highest performance RISC-V application processor, capable of supporting full-featu…
U74 High performance Linux-capable RISC V processor
The SiFive U74 Standard Core is a single-core instantiation of the world's highest performance RISC-V application processor, capa…
S76 MC Quad-core 64-bit embedded processor
The SiFive S76-MC Standard Core is a high-performance 64-bit quad-core embedded processor which is fully-compliant with the RISC-…
S54 64-bit embedded RISC V processor
The SiFive S54 Standard Core is a 64-bit embedded processor that is fully-compliant with the RISC-V ISA.
S51 Low-power 64-bit MCU RISC V core
The SiFive S51 Standard Core is a 64-bit embedded processor, fully compliant with the RISC-V ISA.
S21 Area optimized 64-bit RISC V processor
The SiFive S21 Standard Core is a full-featured 64-bit embedded processor based on the S2 Series.
MIPI-I3C Combo Host and Target interface controller IP for Sensor and Peripheral connection
The MIPI I3C (Improved Inter Integrated circuit) is a two wire bidirectional Serial Bus for sensor communication.
64-bit RISC-V microcontroller. Small core for 64-bit applications.
64-bit RISC-V core.
PUFcc is a novel high-security Crypto Coprocessor.
CPU-less QUIC Offload IP core for FPGA Acceleration
QUIC Client 10Gbps IP Core (QUIC10GC-IP) is engineered from the ground up to simplify the QUIC protocol with TLS 1.3 security int…
64-bit CPU with RISC-V Vector Extension
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the …
The OT3122t130 is a flexible clock multiplier PLL function with a wide range of input and output frequencies and is designed for …
I3C Controller IP – Master / Slave, Parameterized FIFO, APB Bus. I3C Basic Specification Design
The DB-I3C-BASIC-MS-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI …
Compact High-Speed 32-bit CPU Core with MemBoost and PMA
The 32-bit A27 is a 5-stage processor that supports the latest RISC-V specification, including "G" ("IMAFD") standard instruction…
64-bit CPU with Modern RISC Architecture, MemBoost and PMA
The 64-bit AX27 is a 5-stage processor that supports the latest RISC-V specification, including “G“ (“IMAFD”) standard instructio…
This datasheet present s the verification e nvironment of Comsis IEEE 802.11n PHY IP, including a SystemVerilog test bench.