The MIPS I8500™ Multi-Processing System (MPS) builds on a long history of high performance multi-threaded and multiprocessor IP p…
- DMA
System peripheral IP cores are essential building blocks in modern SoC and ASIC designs, providing control, management, and support functions for the overall system operation.
This category includes a wide range of peripheral functions such as DMA controllers, interrupt controllers, monitoring and health management blocks, power management controllers, storage-related controllers, system controllers, and timers & watchdogs. These IP cores help coordinate data movement, system supervision, power optimization, fault detection, and overall platform management.
This catalog allows you to explore and compare system peripheral IP cores from leading vendors based on functionality, performance, power consumption, and process node compatibility.
Whether you are designing embedded systems, automotive platforms, or industrial controllers, you can find the right peripheral IP to support your system architecture.
The MIPS I8500™ Multi-Processing System (MPS) builds on a long history of high performance multi-threaded and multiprocessor IP p…
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
The NVMe controller core (Meissa) is compliant with NVM Express 1.4 specification (NVMe 2.0 Mandatory) and targeted for both ente…
Real-Time Clock with APB Interface
The RTC-APB core implements a real-time clock (RTC) and calendar facility together with an alarm function.
SATA Port Multiplier with Sandbox
The IntelliProp IPP-SA128A-PM (SATA Port Multiplier with Sandbox) device is an IP core that provides SATA Port Multiplier functio…
The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
AXI4-Stream to/from AXI Memory Map - AXI Memory Map Conversion to AXI4-Stream, 16 Channels
The DB-AXI4-MM-TO-AXI4-STREAM-BRIDGE Verilog RTL IP Core accepts AXI4 Memory Map address, control, and data input, converts the a…
AXI4-Stream to/from AXI Memory Map - AXI4-Stream Conversion to AXI Memory Map, 16 Channels
The DB-AXI4-STREAM-TO-AXI4-MM-BRIDGE Verilog RTL IP Core accepts AXI4-Stream data and control input, converts the control TID to …
AMBA AHB 4 Channel DMA Controller
The AHB 4 Channel DMA Controller is a multiple-channel direct memory access controller.
The Roa Logic AHB-Lite Timer IP is a fully parameterized soft IP implementing a user-defined number of timers and functions as sp…
The UTC70 IP core is a drop in module in charge of processing multiple formatted input date/time to translate it into "Coordinate…
SG DMA Controller, 1-16 DMA Channels, AXI4 / AXI3 Master Interfaces
The DB-DMAC-MC-AXI Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 1 – 16 independent data transfers.
SG DMA Controller, 1-16 DMA Channels, AHB5 Master Interface
The DB-DMAC-MC-AHB5 & DB-DMAC-MC-AHB-Lite Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 1 – 16 independent dat…
ZYNQ SATA 3 AHCI Host Controller with Linux Driver
The LDS SATA 3 HOST AHCI XZ7 IP incorporates the AHCI registers model, the Transport layer, the Link layer and the PHY layer on a…
SATA 3 Host Controller on ZYNQ
The LDS SATA 3 HOST XZ7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA.
Extensible Framework (EFW) For Xilinx KC705 Module
Extensible FPGA Framework (EFW) provides a verified set of productivity solutions, including module targeted physical interface c…
The SD/eMMC Host Controller IP Core implements the SD Physical Layer v3.0 and eMMC Physical Layer v4.51 compatible Host Controlle…
The Watchdog Timer is useful in monitoring the condition where a CPU and software get into an unrecoverable unknown or “stuck” st…
The APB Timer module is a sixteen-bit down counter with a selectable prescaler.
The Real Time Clock (RTC) is a clock-calendar IP core that keeps track of the “Time of Day”.