What is ZYNQ SATA 3 AHCI Host Controller with Linux Driver?
ZYNQ SATA 3 AHCI Host Controller with Linux Driver is a SATA Controller IP core from Logic Design Solutions listed on Semi IP Hub.
Vendor:
Logic Design Solutions
Category:
SATA Controller
ZYNQ SATA 3 AHCI Host Controller with Linux Driver
The LDS SATA 3 HOST AHCI XZ7 IP incorporates the AHCI registers model, the Transport layer, the Link layer and the PHY layer on a…
Overview
The LDS SATA 3 HOST AHCI XZ7 IP incorporates the AHCI registers model, the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA. The LDS_SATA 3 HOST AHCI XZ7 IP is compliant with Serial ATA III specification and signaling rate is 6Gbs. The LDS SATA 3 HOST AHCI XZ7 IP is fully synchronous with system frequency (Clock_sys) at 75MHz in case of 3Gbs speed selection and 150MHz in case of 6Gbs speed selection. The source code format is available for ease of customization. The customization can be done by Logic Design Solutions.
Key features
- Linux Driver features
- Linux Kernel 3.12 patch
- Linux AHCI SATA Driver compatible
- Provide standard Linux block device
- Easy to adapt to the future version of Linux Kernel
- Support any Linux file system
- AHCI features
- 1 port
- AHCI Generic Host Registers set
- AHCI Port Host Registers set
- Physical Layer features
- Detect OOB and COMWAKE
- Detect the K28.5 comma character and provides a 32 bit parallel output
- Power management mode handled by state machine (shared between Phy and Link layer)
- Provides error indication to upper layers
- 8b/10b encoding and decoding in Xilinx Zynq GTX Macro
- 6Gbs or 3Gbs Speed
- Link Layer features
- Scrambling of tx data and descrambling of rx data
- CRC 32 calculation and check
- Report transmission status and error to Transport Layer
- Enable BIST loopback and pattern generation modes
- Auto inserted hold primitive to avoid FIFO overflow and underflow
- Partial and slumber power management modes
- CONT primitive management in receive and transmit
- Transport Layer features
- 48-bits sector address
- Programmed IO (PIO) and DMA modes
- Support BIST FIS transmission and reception
- Automatic error FIS retry capability
- Implement Shadow Registers and SATA SuperSet registers
- Simple synchronous CPU and DMA Interface for data transfers including DMA hold-off capability
- DMA interface can be connected easily to memory space or FIFOs (FIFO interface provided)
- NCQ Support.
Block Diagram
LDS SATA 3 HOST AHCI XZ7 block diagram
What’s Included?
- Source code or Synthesis Netlist :
- Data Sheet, EDK project Description,
- SATA HOST AHCI AXI Interface Description and Constraint File.
- Demo :
- Linux bootable SD card compatible with ZC706+XM104 boards
- Linux Kernel 3.12 patch
- Linux AHCI SATA Driver compatible
- Provide standard Linux block device
- Easy to adapt to the future version of Linux Kernel
- Support any Linux file system
- Linux kernel 3.12 – tested and validated with kernel 3.12 from Xilinx
- Linux open firmware / device tree
- Linux standard device interfaces
- Linux package has been done by Armadeus Systems : www.armadeus.com
Specifications
Identity
Part Number
LDS SATA 3 HOST AHCI XZ7
Vendor
Logic Design Solutions
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
FRANCE
Frequently asked questions about SATA Controller IP
How should engineers evaluate this SATA Controller?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SATA Controller IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.