System peripheral IP cores are essential building blocks in modern SoC and ASIC designs, providing control, management, and support functions for the overall system operation.
This category includes a wide range of peripheral functions such as DMA controllers, interrupt controllers, monitoring and health management blocks, power management controllers, storage-related controllers, system controllers, and timers & watchdogs. These IP cores help coordinate data movement, system supervision, power optimization, fault detection, and overall platform management.
This catalog allows you to explore and compare system peripheral IP cores from leading vendors based on functionality, performance, power consumption, and process node compatibility.
Whether you are designing embedded systems, automotive platforms, or industrial controllers, you can find the right peripheral IP to support your system architecture.
Xilinx Ultra Scale Plus SATA HOST IP
The LDS_SATA3_HOST_GTHE4 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Ultra Scale Plus GTHE4…
NVM Express (NVMe) Controller (compliant with NVMe 1.4 Base Specification)
The NVM Express (NVMe) controller is compliant with NVMe 1.4 Base Specification.
SD 5.1 / eMMC 5.1 Host Controller IP
Our Host IP is specially designed to combo both SD eMMC features.
SD/SDIO Combo Device IP core is an SD memory controller and an SDIO controller with an AHB interface.
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processor…
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
The Stream Buffer Controller IP Core is optimized for Intel (Altera) and Xilinx FPGAs and implements a versatile Stream to Memory…
Sub-Nanosecond Resolution, Sub-Microsecond Accurate, FPGA System Timer Component
Atomic Rules TimeServo is a RTL IP core that serves the function of an FPGA’s System Timer or Clock.
The CC-WDT-AXI is a synthesisable Verilog model of a watchdog timer controller.
The CC-WDT-APB is a synthesisable Verilog model of a watchdog timer controller.
Configurable System Tick Counter
The CC-SYSTICK-AXI is a synthesisable Verilog model of a system tick timer counter controller.
Configurable System Tick Counter
The CC-SYSTICK-APB is a synthesisable Verilog model of a system tick timer counter controller.
The CC-TIMER-AXI is a synthesisable Verilog model of a timer counter controller.
The CC-TIMER-APB is a synthesisable Verilog model timer counter controller.
Peripheral Direct Memory Access Controller
The CC-PDMA-AXI-AXI is a synthesisable Verilog model of a peripheral direct memory access controller.
Peripheral Direct Memory Access Controller
The CC-PDMA-APB-AHB is a synthesisable Verilog model of a peripheral direct memory access controller.
The IntelliProp IPP-NV186A-BR is an NVMe-to-SATA Bridge that utilizes the IntelliProp NVMe Target IP Core and the IntelliProp SAT…