SHA3 Cryptographic Hash Cores

The SHA cores provide implementation of cryptographic hashes “Keccak” SHA-3 (cores SHA3-224, SHA3-256, SHA3-384 and SHA3-512) and (optionally) the corresponding hash-based HMAC, KMAC, and XOF (SHAKE) functions

The cores utilize “flow-through” design that can be easily included into the data path of a communication system or connected to a microprocessor: the core reads the data via the D input and outputs the hash result via its Q output. Data bus widths for both D and Q are parameterized.

The design is fully synchronous and is available in both source and netlist form.

Function Description  

The SHA-3 algorithms process data in block of different size that depends on the particular algorithm:

The Secure Hash Standard (SHA-3) is a message digest standard as defined in the FIPS-202 publication
http://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.202.pdf .

The core is designed for flow-through operation. The input data can contain any number of bytes up to 229 (data padding is performed inside the core). The output data is the 224/256/384/512-bit hash or HMAC value.

• Completely self-contained; does not require external memory
• SHA3-224, SHA3-256, SHA3-384, and SHA3-512 support SHA-3 algorithms per FIPS 202.
• SHAKE128 / SHAKE256 XOF support is included.
• Flow-through design; flexible data bus width
• Test bench provided

• Post-quantum cryptography(PQC)
• Message digest calculation
• Digital signature (DSA) algorithm of the Digital Signature Standard (DSS) per FIPS-186
• Key derivation function (HKDF per RFC RFC 9688)
• KMAC128 or KMAC256 as defined in Section 4.4 of NIST.SP.800-108r1-upd1
• Security protocols, including
  • S/MIME (PKCS #1, RFC 9688)
  • IPSec

• Synthesizable Verilog RTL source code
• Test bench (self-checking)
• vectors for testbenches
• Expected results
• User Documentation