Clocking and timing IP cores are fundamental to semiconductor designs that require accurate clock generation, distribution, synchronization, and timing control. This category includes PLLs, DLLs, oscillators, and clock generators used in SoCs, ASICs, SerDes subsystems, processors, memory interfaces, and communication devices.
Browse clocking and timing IP from multiple vendors to compare jitter, frequency range, locking behavior, power consumption, programmability, and process support. Semi IP Hub helps chip architects and design engineers identify the right timing IP for high-performance and low-power silicon platforms.
PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN6FF
The PCIe Gen5 Ref Clock SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support…
PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN3P-CLN3X
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN3E
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
PCIe Gen3 Class SSCG PLL on TSMC CLN16FFC
The PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI E…
PCIe Gen3 Class SSCG PLL on TSMC CLN12FFC
The PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI E…
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
Low Power Frac-N on TSMC CLN28HPC+
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.
Low Power Frac-N on TSMC CLN28HPC
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.
Low Power Frac-N on TSMC CLN22ULL
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.
Low Power Frac-N on TSMC CLN16FFC
The low power Fractional-N PLL addresses power sensitive designs required for IOT, mobile and other low power applications needin…
Low Power Frac-N on TSMC CLN12FFC
The low power Fractional-N PLL addresses power sensitive designs required for IOT, mobile and other low power applications needin…
Low Power Cascade PLL on TSMC CLN65LP
The low power cascade PLL addresses a large portfolio of applications, ranging from non-integer clock multiplication to programma…
Low Power 32KHz Crystal Oscillator on TSMC CLN16FFC
High end consumer and professional applications require crystals with a minimum number of external components.
Low Power 32KHz Crystal Oscillator on TSMC CLN12FFC
High end consumer and professional applications require crystals with a minimum number of external components.
Low Noise Crystal Oscillator on TSMC CLN7FF
High end consumer and professional applications require crystals with a minimum number of external components.
Low Noise Crystal Oscillator on TSMC CLN6FF
High end consumer and professional applications require crystals with a minimum number of external components.
Low Noise Crystal Oscillator on TSMC CLN5
High end consumer and professional applications require crystals with a minimum number of external components.
The Low Jitter PLL creates a high quality clock with good duty cycle and jitter characteristics useful for source synchronous int…
Jitter Cleaning PLL on TSMC CLN40G
The Jitter Cleaning PLL macro is implemented in Analog Bits’ proprietary architecture that uses 0.9V core and 1.8V IO oxide devic…
High Speed Multi-Phase PLL on TSMC CLN6FF
The High Speed PLL creates a high-speed clock with good duty cycle and jitter characteristics useful for high speed, source synch…