SMIC 65nm Low Leakage Process 24Bit Stereo Sigma-Delta ADC/DAC
The S65LLV25_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifie…
The S65LLV25_DAC_01 specifies the design of a high-performance 24-bit stereo Audio DAC for portable digital audio systems.
The present IP is a VCC Detector (VDT) circuit.
The present IP is a VCC Detector (VDT) circuit which detects the voltage level of its power supplies, AV18 and AV33.
SMIC 0.18um 3.3v��1.8v Power Regulator
Power Regulator, also called Voltage Regulator, is an on-chip device which converts an external high voltage power supply into su…
SMIC 0.18um 3.3v-1.8v Power Regulator
Power Regulator, also called Voltage Regulator, is an on-chip device which converts an external high voltage power supply into su…
SMIC 0.18um Crystal Oscillator IO_01
This crystal oscillator IO pad is designed for 1.8V OSC power supply.
This analog 2-1 MUX is designed for low speed application.
The LVDS transceiver IP is a Serializer/Deserializer (SERDES) pair that transparently translates 12–bit parallel bus into serial …
To provide a solution to MMC cards, SMIC18_MMC_07C_4IN1 is consolidated by four independent IPs: SMIC18_PRG_03E_33T18V60_240mA, S…
SMIC 0.18um 12/8 Bit 1M/200K Differential/Single Ended 3.3v Rail to Rail SAR ADC
This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.
SMIC 0.18um 3.3V 10Bit Single 48MHz ADC
The VeriSilicon SMIC18_ADC_03 IP is a 10 bit, low power, and pipeline analog to digital converter capable of running at up to 50M…
This analog 2-1 MUX is designed for low speed application.
SMIC 0.13um 24-Bit Stereo Sigma-Delta ADC
The S13V33_ADC_01B specifies the design of high-performance 24-bit stereo Audio ADC for portable digital audio systems.
SMIC 0.13um 1.2v / 3.3v Audio PLL
This PLL is designed for audio clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturin…
VeriSilicon SMIC 0.18μm 1.8V/3.3V CFIO_01 Library
VeriSilicon SMIC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for SMIC 0.18μm 1P6M Salicide logic proces…
The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial…
VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_02 I/O Cell Library
VeriSilicon SMIC 0.13μm SSTL2/SSTL18 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing…