Overview
The VeriSilicon SMIC18_ADC_03 IP is a 10 bit, low power, and pipeline analog to digital converter capable of running at up to 50MHz conversion rate. The ADC cell integrates several stages of sample/hold, MDAC stages, a reference bias circuit, and a clock circuit along with the analog to digital converter circuit. The SMIC18_ADC_03 operates when the power-down signal (PWDN) is at logic level ‘0’, and goes into power-down state when the power-down signal is at logic level ‘1’. The SMIC18_ADC_03 IP is useful in a variety of data signal conversion applications, especially in video applications.
Learn more about ADC IP core
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