Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: GPIO

VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO Library

VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturin…

Overview

VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.11um (0.13um 90% direct shrink) Logic 1P8M Salicide 1.2/3.3V process. This library provides 5V analog IO pads. This library supports Device Under Pad (DUP).

Key features

  • SMIC 0.11um Logic 1P8M Salicide 1.2/3.3V process
  • Provides 5V analog IO pads
  • Supports Device Under Pad (DUP)
  • Provides cells to interface with Generic IO library
  • Suitable for six, seven, or eight metal layers of physical design

Silicon Options

Foundry Node Process Maturity
SMIC 110nm G —

Specifications

Identity

Part Number
S11V33_ANALOGIO_DUP_05
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

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Frequently asked questions about GPIO Pad Library IP cores

What is VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO Library?

VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO Library is a GPIO IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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