16 State DVB-S2/DVB-S2X Tail Biting Viterbi Decoder
The VA04D is a 16 state tail-biting error control decoder using the maximum likelihood Viterbi algorithm.
- Channel Coding
- Now
- DVB–S2 (ETSI EN 302 307–1 V…
Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
16 State DVB-S2/DVB-S2X Tail Biting Viterbi Decoder
The VA04D is a 16 state tail-biting error control decoder using the maximum likelihood Viterbi algorithm.
40G I.6 LDPC Encoder/Decoder for ITU G.975.1
The IPrium-40G-I.6-LDPC-Codec IP core implements the LDPC (32640, 30592) forward error correction algorithm for optical lines and…
Tiny, Energy-efficient, MCU + DSP
ZSPNano is the perfect choice for Always ON applications involving sound detection, voice quality enhancement and command recogni…
40G I.3 BCH Encoder/Decoder for ITU G.975.1
The IPrium-40G-I.3-BCH-Codec IP core implements "Concatenated BCH super FEC" with BCH(3860, 3824) and BCH(2040, 1930) forward err…
Burst-mode BPSK Modem with highly efficient packet structure
The IPrium-Burst-BPSK Modem IP Core is a burst-mode digital BPSK modem and is optimized for microwave communication systems opera…
The Core can reach payload bitrates up to 2.5 Gbits/s ( equivalent baud rates > 600Mbaud).
The IPrium-DVB-S2-Modulator IP Core implements the DVB-S2 modulation standard ETSI 302 307.
The IPrium-DVB-S-Modulator IP Core implements the DVB-S modulation standard ETSI 300 421.
10G I.3 BCH Encoder/Decoder for ITU G.975.1
The IPrium-10G-I.3-BCH-Codec IP core implements "Concatenated BCH super FEC" with BCH(3860, 3824) and BCH(2040, 1930) forward err…
LDPC CCSDS (8160, 7136) Encoder and Decoder
The IPrium-CCSDS-LDPC-8160-7136-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algor…
The IPrium-RS-Codec IP Core implements Reed-Solomon forward error correction algorithm.
ASIC IP-core for high-throughput decoding of DVB-S2/S2X, and DVB-RCS/RCS2
Very high throughput (several Gbps) decoder that can be configured on-the-fly as: DVB-S2/S2X LDPC decoder or as Six independent D…
TC1600 is ideally suited for applications requiring small to medium block sizes in order to reduce latency and offer a high physi…
TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs.
Multi-gigabit Modem for E-band backhaul systems
The IPrium-Multi-gigabit Modem IP Core is a BPSK/QPSK modem with integrated Reed-Solomon Forward Error Correction (FEC) and is op…
The IPrium-DVB-T-Modulator IP Core implements the modulation standard ETSI EN 300 744 V1.6.1 DVB-T.
The IPrium-DVB-S-Demodulator IP Core is a QPSK/BPSK demodulator and channel decoder for digital satellite television transmission…
The IPrium-DVB-S2X-Modulator IP Core implements the DVB-S2X modulation standard ETSI 302 307-2.
The IPrium-DVB-CID-Modulator IP Core implements the modulation standard ETSI TS 103 129 V1.1.1 (2013-05) DVB-CID.
10G I.9 BCH Encoder/Decoder for ITU G.975.1
The IPrium-10G-I.9-BCH-Codec IP core implements "two interleaved extended BCH" super-FEC code for optical lines and is fully comp…