Vendor: TurboConcept Category: Channel Coding

LTE turbo decoder

TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs.

Overview

TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs. Its unique pipe-line architecture enables to reach very high clock frequencies on high end FPGAs It offers several algorithm options to meet various trade-offs between error correction performance versus Core complexity.

Key features

  • Covers rate-matching, turbo decoding and CRC decoding
  • Throughput level 75 to 300 Mbps
  • Near floating point error correction performance
  • High throughput Max-Log-MAP algorithm
  • Efficient and flexible optional Log-MAP algorithm
  • Multi-processor architecture, several throughput levels selectable before synthesis - from 75 to 300 Mbits/s decoded
  • Optimal iteration stopping feature for reducing average number of iterations without performance degradation
  • On-the-fly change of block length and number of iterations
  • Low latency
  • No external memory required
  • Available on all popular Xilinx, Altera and Lattice devices
  • Field proven

Applications

  • LTE
  • LTE-A

Specifications

Identity

Part Number
TC7000-LTE
Vendor
TurboConcept
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: FRANCE

Learn more about Channel Coding IP core

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Frequently asked questions about Channel Coding IP cores

What is LTE turbo decoder?

LTE turbo decoder is a Channel Coding IP core from TurboConcept listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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