These cores implement a Bose-Chaudhuri-Hocquenghem (BCH) error correction code configured to process a k-bit codeword, providing …
- Channel Coding
Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
Compare DSP and Math IP by processing architecture, supported numeric formats, throughput, latency, programmability, power efficiency, and target application. These IP solutions are widely used in communications, audio, vision, radar, industrial control, AI preprocessing, and embedded compute platforms.
These cores implement a Bose-Chaudhuri-Hocquenghem (BCH) error correction code configured to process a k-bit codeword, providing …
CPU IP Following the RVA23 Profile, supporting RVV1.0 and all extensions of Vector Crypto
Dubhe-83 CPU IP features a 10+ stage pipeline, 3-issue, and out-of-order pipeline, follows the RVA23 Profile, supports RV64GCBVH,…
In Digital video broadcasting for digital transmission for satellite applications, a FEC (Forward Error Correction) sub-system is…
The K-best decoder is part of the MIMO decoder.
This core can perform the two dimensional Discrete Cosine Transform (DCT) and its inverse (IDCT) on an 8x8 block of samples.
The XC23 is the most DSP core available today for communications applications.
Color Space converter & Chroma Resampler- 4:4:4 RGB to 4:2:2 Y’CbCr
The DB1825 Color Space Converter & Chroma Resampler Verilog IP Core transforms 4:4:4 sampled RGB color components to 4:4:4 Y’CbCr…
4:4:4 Y’CbCr to 4:2:2 Y’CbCr Chroma Resampler (ITU-R BT.601)
The DB1820 Chroma Resampler IP Core down converts 4:4:4 Y’CbCr to 4:2:2 Y’CbCr in accordance with the ITU-R BT.601 standard requi…
The eMMC LDPC Encoder/Decoder is an flash reliability solution engineered to maximize flash endurance and retention.
The SCE02C is a very high speed 4 state CCSDS compatible serial concatenated convolutional code (SCCC) encoder with frame marker,…
The SiFive® Intelligence™ X288 is a multi-core capable processor extensively optimized to meet the harsh environmental and string…
The RTL is configurable for number of message bits that need ECC protection.
Zero latency, asynchronous, low power , low gate count FireCode FEC.
BCH code statistics for different `$mm` `$tt` Zero latency, low gate count, low power, asynchronous BCH Code based Error Correcti…
Reed Solomon Error Correcting Code ECC
RS Code Statistics for different values of `$mm` `$tt` Zero latency, low gate count, low power, asynchronous Reed Solomon Code ba…
Zero latency, low gate count, low power, asynchronous Reed Solomon Code based Erasure code for RAID FEC: The whole operation of e…
Hardware Accelerator for 4D Imaging Radar Solution for Vision 331 and Vision 341 DSPs
Next-generation DSP for embedded vision and AI with millions of units shipped in the market
First DSP for embedded vision and AI with millions of units shipped in the market The Cadence® Tensilica® Vision P6 DSP, introduc…
The MAN_CODEC IP Core is a versatile encoder and decoder pair that converts a basic NRZ bitstream into a standard Manchester code…
HIgh-speed & Low latency Search Engine
tCAM-IP is a high performance, extremely low latency and configurable ternary content-addressable memory IP.