Multi-core capable processor
The SiFive® Intelligence™ X288 is a multi-core capable processor extensively optimized to meet the harsh environmental and string…
Overview
The SiFive® Intelligence™ X288 is a multi-core capable processor extensively optimized to meet the harsh environmental and stringent reliability requirements of aerospace and defense applications. The X288 features the powerful combination of a RISC-V 64-bit 8-stage dual-issue in-order scalar pipeline and a 512-bit vector length pipeline. Many space compute algorithms require a mix of scalar and vector computation. The scalar pipeline/ALU of the X288 utilizes an optimized L1 cache, whilst the loosely coupled vector unit streams from private L2 cache allowing both operate and access data in parallel.
Key features
SCALAR PROCESSING
- 64-bit RISC-V ISA, 8-stage dual-issue in-order pipeline
- Linux capable applications processor with MMU & caching architecture
VECTOR PROCESSING
- RISC-V vector extension v1.0 (RVV1.0) standard
- 512-bit vector register length (vlen), datawidth (dlem) is 256-bits.
- Variable vector length computation supported, up to 4096-bits
- Dynamic runtime adjustment of vector lengths to match application array sizes to provide the most efficient computation
- Support for vector length multiplier (LMUL), the ability to concatenate multiple vector registers to increase computations performed by a single instruction
- Extensive range of vector datatypes and sizes, including BF16/FP16/FP32/FP64, integer INT8 up to INT64
MULTI-CORE, MULTI-CLUSTER CONFIGURATIONS, UP TO 8 CORES
- Control and reset of individual cores via PMC port, system and tile Management.
- Core Local Instruction TIM and Data Local Storage (DLS) for timing deterministic critical computation algorithms
- L3 cache core isolation mode (coarse grain hash function)
- Independent cluster cache-coherency disable using L3 cache bank address hashing
Block Diagram
Benefits
- Performance: SiFive Intelligence Extensions enable enhanced functionality and acceleration instructions for matrix computation so that the X288 processor can achieve a best-in-class 4.5 TFLOPs (bfloat16 MatMul) or 9.2 TOPS (INT8 MatMul) for AI/ML computation acceleration.
- Power Efficiency: The X288 exhibits superior power efficiency due to its ability to turn off various sections of the chip when not in use.
- Longevity: RISC-V architecture is a safe bet for long-lived ecosystem support due to open standard ISA
Specifications
Identity
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Provider
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Frequently asked questions about DSP Core IP cores
What is Multi-core capable processor?
Multi-core capable processor is a DSP Core IP core from Sifive, Inc. listed on Semi IP Hub.
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