System-on-chip bulk CMOS can cause a paradigm shift
Dr. Jonathan Cheah and Jennifer Ayers, Jaalaa Inc.
Jun 12, 2006 (5:00 AM), CommsDesign
As the total cost gap closes between wireless systems made of discrete components and wireless system-on-chip (SoC) solutions, the time has come to consider trading traditional pcb and discrete device solutions for fully-integrated silicon designs. The paradigm shift from the traditional pcb and its multiple discrete systems circuits to a single silicon substrate changes the product design concepts, design flow, key resources, and the nature of the development and product cycle.
In the last five years, logic bulk CMOS processes have replaced RF CMOS processes for the mass production of mixed-signal SoCs. Many of these products produced using bulk CMOS processes operate in high frequencies such as the common 2.4-GHz ISM band and the increasingly common 5.7-GHz band. The success of these bulk CMOS high-frequency mixed-signal designs has sparked further advancement. For example, SoCs incorporating all components—the RF transceiver, CPU, ROM, RAM, and necessary product interfaces—have emerged.
Complete SoC integration initially required a large-volume market to make economic sense, and Bluetooth cellular headsets were the first major integrated wireless product to have this. Size, weight, and dc power constraints of these headsets necessitated complete product-on-chip integration. All functional blocks needed for product integration outside of the Bluetooth core were integrated into the same silicon substrate. These blocks include the dc-to-dc converter, the audio codec, and audio amplifiers suitable for driving the miniature speaker.
Rarely in consumer electronics has a complete wireless communications system been implemented with a specific product in mind. In this case, the silicon substrate fulfilled all the roles the pcb and discrete components usually play. The pcb is just a structural extension of the plastic enclosure, used as a chip carrier and to accommodate noise-decoupling capacitors (Fig. 1).
To read the full article, click here
Related Semiconductor IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
- UCIe 2.x Controller IP
- SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP
- OpenTitan-based RISC-V Secure Element
Related Articles
- CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus
- A 24 Processors System on Chip FPGA Design with Network on Chip
- Using non-volatile memory IP in system on chip designs
- Single core to multicore: Addressing the system design paradigm shift with project management and software instrumentation
Latest Articles
- A Secure dToF LiDAR SoC with Dual-Domain Fingerprinting and Event-Driven AFE Circuit Achieving Sensor-Level Attack Resilience
- ZTA-Q: an Open-source RISC-V Platform for Accurate Quantized CNN Inference
- Automated Pre-Silicon Verification of High-Speed DDR5 and LPDDR5/6 Memory Controllers: Closed-Loop Timing, Mode Register, and PHY Synchronization in UVM
- U-Sonic: An Open-Source 8-Channel Ultrasound Transmit IP in a 130 nm RISC-V SoC
- S-ALSA: Co-Design of Adiabatic Logic-based Sensing and Balanced Bit-Cells for Secure and Energy-Efficient MRAM